ACT Apricot disk image㐞 F^ ) (C) ACT 1983 vFONT=BRIT02 KEYS=ACT001 㐞@`  @`! #@%`')+-/1 35`79;=?A C@E`GIKOQ S@U`WY[]_a c@e`gikmoq s@u`w{} @` @ ` @ ` @ ` @ ` ǀ ɠ O ` ׀ ٠  O` @`!Aa   !Aa!!#A%a'+-/1!3A5a79;=?/CEaGIKMOQ!SAUa㐞WY]a!cAeagikmoqsAuay{}!Aa!Aa!a!Aa!Aaǁɡ!Ao١!Aa㐞@`  @`! #@%`')+-/1 35`79;=?A C@E`GIKOQ S@U`WY[]_a c@e`gikmoq s@u`w{} @` @ ` @ ` @ ` @ ` ǀ ɠ O ` ׀ ٠  O` @`!Aa   !Aa!!#A%a'+-/1!3A5a79;=?/CEaGIKMOQ!SAUa㐞WY]a!cAeagikmoqsAuay{}!Aa!Aa!a!Aa!Aaǁɡ!Ao١!Aa㐞Apricot V:KB DOC Jc:bTECRFPIODOC oc:40TECRFPICDOC c:M@TECRFOPTDOC c:nTECRFCRTDOC (d:yTECRFSYUDOC Cd: PROMDIAGDOC Rd:TECRFEXPDOC d:IDISK DOC d:1TECRFTMRDOC d:).CHARSET DOC d:AINTRO DOC e:D-TECRFDISDOC e:[SYSB DOC 'e:_TECRFDSPDOC 3e:n㐞TECRFPRFDOC Ae:rCNTDEV DOC xe:wOAUXPORT DOC e: VSCREEN DOC e:`SND DOC e:CONTENTSDOC e:+Z>Z> Z>Z>Z>Z>㐞.HE KEYBOARD .FO # .OP KEYBOARD List of Contents Page INTRODUCTION 2 SERIAL DATA LINK CONTROL AND FORMAT 2 KEYSWITCH OPERATION 㐞 3 MICROSCREEN OPERATION 4 CLOCK OPERATION 5 MOUSE PORT OPERATION 6 KEYBOARD FIRMWARE 6 List of Illustrations Figure MicroScreen Display Codes 1 Keyboard Switch Codes 㐞 2 Keyboard Constructional Details 3 .pa INTRODUCTION Th Aprico Keyboard i rathe mor sophisticate tha th usua compute Keyboard A wel a th keyswitc arra ther i th MicroScreen whic i liqui crysta displa wit tw line o fort characters batter backed-u tim an dat chip membran keypa wit integra LED' an por t connec mous ar al incorporate i th Keyboard La㐞te section o thi chapte describ eac o th abov area i detai an als outlin th operatio o th Keyboar firmware. Th centra elemen i th Keyboar i th processo whic i singl chi device typ numbe 6301 Thi devic ha 4 byte o cod space 12 byte o RAM 2 paralle bidirectiona I/ lines 1 bi timer an UAR al i th on devic togethe wit vectore interrup controlle t facilitat th us o thes facilities A res㐞 ul o thi hig leve o integratio ver littl additiona logi i require t connec th periphera device t th processor. lis o characte code an thei meaning an th MicroScree characte displa code ar containe i tabula forma a th en o th section. SERIAL DATA LINK CONTROL AND FORMAT Th dat lin passe asynchronou seria dat a V2 level betwee th Keyboar an th Syste Unit Th forma i NRZ wi㐞t th "O star bi followe b eigh dat bits followe b "1 sto bit n parit informatio i transmitted Th lin idl conditio i continuou strin o "1s" Th dat transmissio rat i approximatel 780 bit/s Ther i n contro o dat flo fro th Keyboar t th Syste Uni s t avoi th los o dat th Syste Uni ha t b capabl o receivin an processin dat a th maximu dat rat i.e 78 cps. Dat flo fro th Sy㐞ste Uni i controlle i on o tw ways Th firs metho i whe th Keyboar buffe i full i wil the transmi a X-of characte t th Syste Unit Whe th Syste Uni receive th X-of characte fro th Keyboar rathe tha th mous por i mus no physicall sen mor tha fou furthe character i orde t preven overflo a th Keyboard Th Syste Uni wil receiv th X-o characte fro th Keyboar whe th Keyboar buffe i empty i ca res㐞um transmission Wit th exceptio o dat fro th mous port whic woul b precede b prefi code th X-o an X-of character wil no appea i an othe context. Th secon metho i whe dat i bein receive fro th mous port I thi cas th dat constitute a implici X-of conditio an n mor tha fou character ca b physicall sen t th Keyboard A th en o dat receptio fro th mous por transmissio t th Keyboar ma r㐞esum i a X-of characte ha no previousl bee receive fro th Keyboard Th progra i constructe s tha dat fo th tim an dat wil no hav ke dat interleave bu i i possibl tha dat fro th mous por ma b transmitted I orde t avoi confusio al tim an dat informatio wil b i th rang F0 t F9 wher th lowe nibbl contain th data. KEYSWITCH OPERATION Th keyswitc arra consist o 9 capacitiv keyswitche an m㐞embran keys Th capacitiv key ar organise i matri wit twelv row o eigh keys wit som omissions whic ar accesse throug th tw Keytroni proprietar chip connecte t port an o th 6301 Th membran ke position ar rea throug bit t o por o th 6301. Th ke arra i scanne b latchin th appropriat ro addres (i th rang t 11 int th drive Ià an the readin th outpu o th detecto I t determin whic ke㐞y ar depressed Th detecto ha eigh inputs thu knowin whic o th row ha bee strobe th identit o th depresse key ca b determined Th detecto ha tw sensitivities whic ar selecte b latchin ro addres 1 o 1 int th driver thu providin hysteresi eliminatin teasin o th keys I ke stat ha change the th ro i scanne agai 25 u late a th othe sensitivit t giv hysteresi an immunit t externa interference I th ke 㐞i detecte a bein i th sam stat b bot scan an thi stat i differen fro th previou stat the th ke positio ha changed. Whe ke i detecte a havin bee depresse th appropriat characte i transmitte t th System Uni (on o th mak codes an th sam characte wit 80 adde i transmitte whe th ke i released Th actua ke sca code use b th Keyboar handle o th BIO ar illustrate o Figur 1 Th correspondin mak code㐞 i decima ar als detaile i tabl a th en o th section. Th capacitiv keyswitc arra an th membran kayboar ar scanne fo change i ke positio ever 1 ms Key tha ar newl dow hav thei mak cod place i th UARԠ transmi buffe an als i th dela stack whic i eigh byte long I ke i foun t b newl u the it cod i compare wit thos o th dela stack I i i presen i th dela stoc the i i ignored i i i㐞  no presen the th brea cod o th ke i inserte i th transmi buffer Whe al th key hav bee scanne th oldes characte o th dela stac i removed Th sca i performe twic fo eac ro o key tha ha change Th purpos o thi arrangemen i t eliminat ke bounce Th consequenc i tha i singl ke i operate i eac 1 m interva th tim betwee it downcod an it upcod bein transmitte wil b betwee 7 an 8 m crea㐞tin maximu manua repetitio o 12. cps Howeve eac additiona ke presse withi th 1 m interva wil reduc th dela tim b 1 ms I mor tha eigh key ar depresse withi th 1 m interva onl th firs eigh ar detected th remainde ar ignore unti th nex scan Thi i cause b th limitatio o dat transmissio du t th bi rat o abou 1 character pe 1 ms. Th membran key ar debounce fo 3 m o bot mak an brea 㐞t remov bounce Th ke code ar place o th dela stoc i th sam wa a th ordinar ke codes. MICROSCREEN OPERATION Th MicroScreen i liqui crysta displa (LCD wit tw line o fort characters Thes character ar forme o 7x matrix Integra wit th functio key ar si LED' whic togethe wit th CAP LOC an STO LED' ar controlle b th shif registe connecte t bit an o por o th 6301. Th MicroScreen dat line ar㐞 connecte t por o th 630 whic i switche t outpu mod whe dat i transferre t it Dat transfe t i i enable b bi o por an th outpu strob lin fro th 630 latche th dat in Th LCĠ i connecte a write-onl devic an synchronisatio o th dat outpu wit th LC interna operatio i achieve b softwar timing Th LC ha tw registers whic ar selecte b bi o por 1 Th registe selecte whe thi bi i provide th 㐞contro function suc a clea screen curso movemen etc Th othe registe i use eithe fo selectin character t b displaye o writin th dat fo th characte shape tha ar hel i RA rathe tha i th characte generato ROM. Th followin function ar availabl fo th MicroScreen: 1. Text display in two lines of forty characters. 2. Absolute cursor addressing. 3. Move cursor left (non-destructive) 4.㐞 Move cursor right (non-destructive) 5. Clear display. 6. Display on/off 7. Cursor on/off 8. Display time, day and date. Th characte se i show i tabl a th en o th section th code show ar thos tha ar actuall sen t th Keyboard an d no correspon t thos tha ar sen t th MicroScreen devic i MS-DOS. Th curso i singl no blinkin underlin tha i displaye (whe enabled wher㐞 th nex characte sen wil b displayed. .PA Th physica curso addres fo lin on o th displa ar t 27Ƞ an fo lin 40 t 67H Thes ar mappe int th rang 80 t CF (i.e lin 80H-A7H lin A8 - CFH). Th dat an tim ar rea ou o th cloc I an displaye i th to righ sid o th MicroScreen whe th appropriat comman i receive b th Keyboard.Th tim i update ever secon whil i i displaye withou th curso positio 㐞bein disturbed Th forma o th scree fo th dat an tim is:- DAY DD MMM YY HH:MM:SS Th LED' ar controlle b sendin tw character t th Keyboard th LEĠ prefi followe b dat characte i th rang 0 t FF bi se indicate tha th LEĠ wil b switche o an bi clea tha i wil b extinguished. CLOCK OPERATION Th cloc IC a OK MS 5832 ha 1 interna register containin th tim (includin seconds)㐞 th da o th week,th date th mont an th year Th dat i store i bi BC nibbles Th I ca accommodate lea year i appropriatel programme an ca wor i 1 hou o 2 hou mod althoug onl 2 hou mod i use b th Apricot Th cloc frequenc ca b adjuste b mean o variabl capacito o th Keyboard PCB. Th cloc Ià continue t kee tim whe th syste i no powered Thi i becaus th I the draw it powe fro th PP batter㐞  containe i th compartmen o th undersid o th Keyboard case (see Figure 2). Thi softwar provide thre basi functions passin th tim an dat t th Syste Unit displayin th tim an dat o th LCĠ an programmin th cloc wit dat supplie b th Syste Unit. Th Syste Uni request th tim b sendin th appropriat comman t th Keyboard Th Keyboar respond b sendin th tim prefi characte followe b thirtee dat bytes th lowe nibb㐞l contain th BC dat an th hig nibbl i al ones Th orde o th dat is year month date da o th week hours minutes seconds wit ten firs an unit seconds. Th dat an tim ar displaye whe th appropriat cod i sen t th Keyboard Th forma o th scree i show i th sectio o th MicroScreen Th displa o th tim an dat stop whe th clea scree comman i received. Th tim o dat ar programme b sendin th approp㐞riat prefi followe b BC dat i th sam forma an orde a sen fro th Keyboard Othe command ca b interleave wit th cloc data Howeve i dat an tim progra o LE command ar neste䠠 th堠 resultan content o th堠 cloc렠 chi ar unpredictable Th cloc i programme fo lea year b settin bi o th mos significan dat digit. MOUSE PORT OPERATION Th interfac t th mous i basicall hardwar multiplexin arrangement th dat li㐞n fo transmittin fro th Keyboard t th Syste Uni i als use b th Mouse Thi dat lin i als share wit th rese switc whic override an dat transmission. Th mous por provide 1 volt continuousl t th mous an ha tw contro lines use t implemen th hand-shakin protoco an th dat lin use t transmi dat t th Keyboard frothmouse Th tw contro line ar Bu Reques an Bu Grant Bu Reques i asserte b 㐞th mous whe i ha dat t transmit the i th Aprico CP ha sen mous enabl comman t th Keyboard an th Keyboard ha finishe transmittin th curren character th Keyboard wil asser th Bu Gran lin thu permittin th mous t transmi data Thi dat i sen t th CPՠ alon th sam wir a transmitte dat fro th Keyboard Th mous mus no transmi dat whil Bu Gran i no asserte a thi wil corrup an dat currentl bein sen b㐞 th Keyboard. Th堠 Keyboard als ha Mous Disabl堠 command Thi immediatel set th Bu Gran lin inactiv an prevent furthe bu request bein granted Th Keyboard doe no restar transmissio unti th mous set th Bu Reques lin inactive Afte power-u th mous i initially disabled. Th Keyboard Mous Enabl comman allow th assertio o th Bu Reques lin t b recognise b th Keyboard an th bu grante a i th abov descri㐞ption. Th dat fro th mous por i precede b prefi cod (sen b th mous thi i a implici X-of characte an th Syste Uni mus no sen mor tha fou furthe character t th Keyboard A th en o th dat transmissio fro th mous port ma resum i a X-of ha no previousl bee receive fro th Keyboard. KEYBOARD FIRMWARE Th Keyboard firmwar i real-tim interrup drive operatin system Th mai schedule i spli int tw par㐞ts on whic i continuousl execute an th othe whic i onl execute ever 10ms Eac par carrie ou severa operations th firs par scan th receiv characte buffe fo character receive an processe an tha hav no previousl bee deal with i als send X-o whe appropriat an poll th mous por fo th mous releasin th dat link. Th secon par i execute afte th time interrup routin ha bee execute ever 1 m ) I th tim 㐞an dat ar bein displaye the i i update i necessary Afte thi th Keyboard i scanne fo an change t th ke positions I th Keyboard ha no receive rese acknowledg characte sinc powe u o switchin int diagnosti mod rese reques characte i transmitte i 10 m ha elapse sinc th las on wa sent I thi phas al othe character ar ignored. Thi mai routin i interrupte b severa events Th firs i receptio o characte㐞 r fro th Syste Unit th secon i th UAR transmitte bein empty whe ther ar character t sen t th Syste Unit Othe source ar th 1 m time maturing o th mous requestin th bus i i i enabled. Th processin o character receive fro th Syste Uni i spli int tw parts Th firs i al th command tha d no directl affec th LCD Thes ar o th for ExȠ an ar processe b mean o jum table thei effec i show i th㐞 Syste Uni t Keyboar tabl an th relevan section Whe th appropriat cod i receive th processo diagnostic ar executed Ther ar tw tests RO checksu an RA͠ sel addres test I bot o th test ar passe the FBȠ i returned I th RO tes faile the E9 i returned I th RA tes i passe bu th RO tes faile th sequenc E9H FB i returned I th RO tes passe bu th RA tes fail the 80 i sent i bot fai the E㐞9H 80 i sent I al case an dat i th RA i destroye i.e al recor o mak code tha hav bee transmitte i los an th Keyboar i lef i stat wher th cloc chi i i referenc signa outpu mod i.e dat lin oscillate a 102 H wit 50 dut cycle Whil i thi stat th Keyboar send rese reques ever 10 ms. Th Keyboard i extracte fro thi stat b sendin rese comman afte whic i i i it norma mod o operation I re㐞se characte i receive a an othe tim al variable wil b initialise s tha an mak code tha hav bee transmitte wil no hav correspondin brea code transmitte an th initialisatio routin wil b called A acknowledg characte (FB i transmitte whe th Keyboard i read fo furthe operation. Th rese characte ha immediat effect al character tha wer i th buffe ar lost Synchronisatio i achieve b usin砠 th quer comm㐞an an waitin fo th堠 acknowledg indicatin tha th buffe i no empt (provide n mor character hav bee sen t th Keyboar i th intervenin time s tha rese ca b sent. I th comman i i th rang D0Ƞ t D7Ƞ the th LC subroutin i called Thi control al direc acces t th LCD fo exampl th subroutin tha display th tim an dat o th LC read th content o th cloc I an the call thi routine Thi i t㐞ur call subroutin tha actuall output th dat t th LC an insert th appropriat dela t synchroniz wit th LC operation recor i kep o th curren curso position whethe th displa i o o of an whethe th curso i o o of i thi routine Keyboard to System Unit Character Codes 00H unused 01H-60H Mak codes thes correspon t th switc code o th PC  fo switche t 8 switche t㐞 0EȠ ar th membrankeys Switche 0FȠt60Ƞcorrespon t th switc code plu 6. 61H-68H Reserved 69H-6FH Not used by Keyboard 70H-7FH Mouse Codes 80H RAM test failed 81H-E0H Break codes, corresponding to the make codes + 80 H E1H-E8H Reserved E9H ROM test failed EAH X-on EBH X-off ECH Reset request EDH Time prefix EEH Date prefix EFH Mouse Header F0H-F㐞9H BCD data FAH Spare returned for invalid clock data FBH Acknowledge firmware version/or processor diagnostics. FCH-FEH Reserved for future firmware version FFH Unused .pa System Unit to Keyboard Character Codes 00H Unused 01H-FFH Character codes for MicroScreen 80H-CFH Cursor address D0H Clear screen stop time/date display D1H Cursor left D2H Cursor right D3H Cursor on D4H Cursor o㐞ff D5H Display on D6H Display off - display date is not lost D7H-DFH Spare E0H Query EH Time and date request EDH+13 bytes of BCD data returned EH Keyboar rese o acknowledg rese reques afte powe up. E2H Display time and date on MicroScreen E3H Set LED prefix EH Se tim an dat prefi followe b 1 byte o th for FxH. E5H Mouse enable. E6H Mouse disable E7H 㐞  Execute processor diagnostics. E9H - EFH Spare F0H - F9H BCD data FAH Returned if any on the clock data bytes are invalid F8H - FEH Spare FFH Unused Figure 1. MicroScreen Display Codes Keyboard Code Table Keyboard Code Key Legend Keyboard Code Key Legend 㐞 1 HELP 49 7(num. pad) 2 UNDO 50 8(num. pad) 3 REPEAT 51 9(num. pad) 4 CALC 52 CAPS LOCK 5 PRINT 53 A 6 INTR 54 S 7 MENU 55 㐞D 8 FINISH 56 F 9 Function 1 57 G 10 Function 2 58 H 11 Function 3 59 J 12 Function 4 60 K 13 Function 5 61 L 14 Funct㐞ion 6 62 ; 1 63 ' 16 1 64 Return 17 2 65 INSER 18 3 66 DELETE 19 4 67 4(num. pad) 20 5 68 5(num. pad) 㐞 21 6 69 6(num. pad) 22 7 70 SHIFT(L) 23 8 71 Z 24 9 72 X 25 0 73 C 26 - 74 V 27 = 75 㐞 B 28 Backspace 76 N 29 % 77 M 30 Multiply 78 , 31 Divide 79 . 32 -(num. pad) 80 / 33 +(num. pad) 81 SHIFT(R) 㐞 34 Tab 82 Cursor up 35 Q 83 SCROLL 36 W 84 1(On num. pad) 37 E 85 2(On num. pad) 38 R 86 3(On num. pad) 39 T 87 ESC 40 Y 88 CONTROL 㐞 41 U 89 Space bar 42 I 90 STOP 43 O 91 Cursor left 44 P 92 Cursor down 45 [ 93 Cursor right 46 ] 94 0(num. pad) 47 HOME 㐞 95 .(num. pad) 48 CLEAR 96 ENTER Figure 2. Keyboard Codes Figure 2. Keyboard Construc㐞 tional Details  Figure 2. Keyboard Codes Figure 2. Keyboard Construc㐞.HE PARALLE INTERFACE PARALLEL INTERFACE List of Contents Page INTRODUCTION 3 DESCRIPTION 4 General 4 Printer㐞 Interface 5 System Control Interface 6 List of Illustrations Figure Parallel Interface block diagram 1 Centronics Connector pin detail 2 .FO # 㐞 .PA Figure 1.Parallel Interface block diagram PIO Pin Definition PA0 to PA7 Port A PB0 to PB7 Port B PC0 to PC7 Port C D0 to D7 Data bus connection RD Read control line WR Write control line CS 㐞Chip select input A0,A1 System address bus inputs Centronics Connector Details Pin Description Pin Description 1 Data strobe 19 0V 2 D0 20 " 3 D1 21 " 4 D2 22 " 5 D3 8-bit data 23 " 6 D4 output 㐞24 " 7 D5 25 " 8 D6 26 " 9 D7 27 " 10 Acknowledge (Ack) 28 " 11 Busy 29 " 12 Paper Empty (PE) 30 " 13 Select 31 N.C. 14 0V 32 Fault 15 Unallocated Output X 㐞 33 0V 1 0 3 Unallocate outpu Y 17 Ground 35 N.C. 18 N.C. 36 N.C. Figure 2. Centronics Connector pin detail INTRODUCTION Th Paralle Interfac i locate o th Syste Boar an consist o th element o circuitr a detaile o th bloc diagra illustrate above Th interfac perform th follo㐞win function withi th equipment: (aProvide th communication interfac betwee th equipmen an a externa printer vi th Centronic connector (bAllow th processor t detec th activ displa perio o th scree o th Displa Unit b utilisin contro outpu fro th CR contro circuitry. (c Produce serie o contro output t variou area o circuitry, unde software con㐞trol. The control outputs are as follows: (a Tw contro output t determin th selectio o flopp dis drive. (bA outpu t contro th Read/Writ hea loadin of th flopp dis drives. (c contro outpu t switc th Displa Uni o an off. (d contro outpu t selec graphic o alphanumeri mode (e contr㐞 o outpu t rese th CR contro circuits. DESCRIPTION General Th Paralle Interfac consist of programmabl paralle inpu outpu port a octa bu transceiver a octa buffe an Centronic connector Th buffe form th interfac fo contro signal betwee th boar an th printer an th transceive form th interfac fo dat fro th boar t th printer. Th transceive (se Figur 1 i bi-directional wit th directio o㐞 dat flo controlle b th BIOS Whils use a printe port th flo o dat i alway i on directioonly, ou t th printer Howeve wit th directio capabilit o th transceiver th por ca b mor generall use fo transferrin dat t an fro the Apricot. Th thre inpu contro signals Fault Ac an Bus ar connected vi th buffer t inpu line o th seria interfac o th boar (SIO) Th thre input ar use t generat a interrup t th 㐞CPU utilisin th interrup capabilitie o th SIO Th Inte 8255A- Paralle Inpu Outpu Por (PIO i organize internall a thre input/outpu ports wit a associate contro register Th contro registe determine th directio an mod o operatio o eac port. Th syste softwar view th thre port an th contro registe a a arra o periphera ports wit th por addres location define b th PI selec an syste addres㐞 bu connections a detaile below. Peripheral Port Address Data Port A 48H Printer data Port B 4AH System control outputs Por 4CȠ Printe contro inputs/outputs plus a system control input. Control register 4EH Control word Th constraint o th variou hardwar input an output t an fro th PI dictate th mod an directio o 㐞operatio o th thre ports Por A Por an th mos significan bit (MSB o Por à ar configure a output an th leas significan bit (LSB o Por ar configure a inputs t provid th interfac wit printe an th syste connections Th堠 operatin砠 mod堠 require i th堠 basi㠠 input/outpu mode define a Mod 0 Th contro wor t b writte t th contro registe t se th thre port int th require operatin configurati㐞o i thu a follows: D7 D0 1 0 0 0 0 0 0 1 Se Por (LSB) as inputs Set Port B as an output port Se Mod fo Por an Por C(LSB) Set Port C(MSB) as outputs Set Port A as an output port Set Mode 0 for Port A and Port C (MSB) 㐞 Select Mode definition Afte th mod an directio o operatio o th thre port i define b th contro word th port remai i th se operatin conditio unles redefine b differen contro wor o rese b th syste reset Th syste reset whe activ (logi high) configure al line o th thre port a inputs Readin dat fro an writin dat t th port o th PIϠ i performe b simpl㐞 input/outpu operations usin th addres location detaile above Dat writte t por i latche int th PIO whils dat rea fro th PI i no latched Printer Interface Eigh bit o paralle dat ar supplie t th printe vi Por o th PI an th transceiver T se th transceive t transmi dat t th printer,th MS o Por (PB7 i se t logi low Th transceive an th buffe fo th printe contro signals are TTL devices. 㐞 Th definitio o th contro output t an fro th printe is detaile below. Dat Strob Outpu timin signal Use t latc th dat int th printer Normall a logi high Positiv edg o logi lo puls indicate printe dat i valid. Pape Empt (PE Inpu signal Logi hig stat indicate 㐞  tha th printe i ou o paper. Faul Inpu signal Logi lo stat indicate a printe faul condition Selec Inpu signal Logi hig statindicate th selec statu o printer;logi lo th deselec status Acknowledge(ACK Inpu signal Logi lo stat indicate tha th㐞 printe i read t receiv mor data. Bus Inpu signal Logi hig stat indicate tha th printe i unabl t receiv an data Th thre printe inputs Fault Acknowledg an Bus ca generat a interrup reques t th CP b programmin th SI an interrup controller Th SI i als abl t produc a associate interrup vecto internally t indicat th 㐞 caus o th interrupt Th syste softwar ca the determin th caus o th interrup an th require servic routine b usin dat availabl fro th SI an dat o th printe statu lines. System Control Interface Por   an on inpu t Por o th PIϠ for th syste contro interfac betwee th processor an othe area o hardwar o th Syste Board Th syste contro line ar define below. PB Rese t CR control Activ sta㐞 te logi low Whe active inhibit th productio o th displa addres informatio an vide timin signal, an clear th display address counters to zero count state. PB HL t flopp dis drives Activ state logihigh Whe active engage th read/writ hea o th selecte dis driv agains th disk. PB Displa o (DON t vide interface log㐞 i low o thi contro lin allow th generate vide signa throug t th Displa Unit Conversely, logihigh prevent th vide signa fro reachin th Displa Unit PB A/ selec t CR control logi hig (alphanumeric o thi contro lin set th CR contro circuitr t operat i th characte displa mode㐞 logi lo (graphics set th CR contro circuitr t operat i th graphic mode PB5,PB Dis selec line t th flopp dis drives Th selectio o dis driv i determine a follows PB6 PB5 Select dis driv configure a driv 0. 0 1 No selection. 1 0 Selects disk drive configured as drive 1. 1 1 No selection. 㐞 PB Directio contro fo th transceive o th paralle interface logi lo o thi contro linenables dat t b route fro Por t th output logi high reverses the direction of data flow. PC Displa enabl (DE fro CRԠ contro circuitry logi hig o thi contro lin indicate th activ lin perio o th Displa Unit logi lo indicates the flyback periods. 㐞 bles dat t b route fro Por t th output logi high reverses the direction of data flow. PC Displa enabl (DE fro CRԠ contro circuitry logi hig o thi contro lin indicate th activ lin perio o th Displa Unit logi lo indicates the flyback periods. 㐞 .HE INTERRUP CONTROLLER .FO # PROGRAMMABLE INTERRUPT CONTROLLER List of Contents Page INTRODUCTION 2 DESCRIPTION 3 General 3 㐞 Interrupt Sequence 3 Interrupt Masking 4 PROGRAMMING CONSIDERATIONS 4 General 4 Initialization Command Words 5 Operational Command Words 7 List of Illustrations 㐞 Figure Interrupt Controller block diagram 1 .PA INTRODUCTION Th Inte 8259 Programmabl Interrup Controlle (PIC form th interfac betwee th device capabl o generatin interrup request an th interrup contro lin o th 808 processo (CPU o th Syste Board) Interrup request ar supplie t th PIC whe th devic require a associate servic routin t b undertaken. Th PIà function a th manage o th㐞 interrup drive processin system generatin a activ interrup t th 808 processo onl whe a incomin interrup reques ha highe priorit tha an interrup servic routin alread i operation O acknowledgemen fro th CP tha i i abl t accep th generate interrupt th PI supplie vectorin dat t th CP whic act a pointe t th require servic routine Th vectorin data th mod o operatio o th PI an th priorit o th interrup㐞 request ar se u b softwar withi th Boo PROM and BIOS. Figure 1. Interrupt Controller block diagram PIC Pin Definition IR0 to IR7 Interrupt request inputs INT Interrupt output INTA Interrupt Acknowledge D0 to D7 Data bus connection RD Read control line WR Write control line 㐞 CS Chip select input A0 System address bus input DESCRIPTION General Th devic connection t th interrup reques line o th PI ar illustrate o th bloc diagra o Figur an expande i mor detai below A activ interrup reques i indicate b logi hig stat o th appropriat reques line. 808 SINTR1 Interrup fro Input/Outpu Channe o th 8089 Inpu Outpu Processo (IO㐞 P). 808 SINTR2 Interrup fro Input/Outpu Channe o th 8089 Inpu Outpu Processor. INT2 Interrup controlinwired t bot Expansio Slots INT3 Interrup contro linwired t bot Expansion Slots. FDC INT Interrupt from the Floppy Disk Controller. SI INT Interrup fro th SI o th Seria Interface. TM OUT Outpu fro Counte o th Programmabl 㐞 Interval Timer (TMR). 808 INԠ Interrup fro th Numeric DatProcesso (NDP) Th syste softwar view th PI a tw input/outpu port, wit eac por abl t accep an provid variet o dat bytes Th por addres locations define b th PI selec lin an th syste bu connection togethe wit th abbreviation o th dat byte ar give below detaile explanatio o th dat ca b foun i th PROGRAMMINǠ CONSIDERATIONӠ sec㐞 tio overleaf. Port Address Data Bytes Transfer Operation 0 IRR/ISR Read 0 ICW1/OCW2/OCW3 Write 1 IMR Read 1 OCW1/ICW2/ICW4 Write Interrupt Sequence Th interrup sequenc, entere o receip o logihig o an o th interrup reques line o th PI i describe i th followin paragraphs Thi sequenc i th sam reg㐞 ardles o th actua PI interrupt request line being set active Whe on o mor o th interrup reques line ar se int th activ hig state correspondin bit i a 8-bi interna registe withi th PI (th Interrup Reques Register-IRR ar als set Th PI select th highes priorit bi store i th IRR whic i no maske b th software fo compariso wit bit store i secon 8-bi registe (th Interrup Servic Register-ISR) t determin wh㐞 ethe a interrup shoul b issue t th CPU Th Interrup Servic Registe contain bit whic indicat th interrup servic routine currentl bein execute b th CPU I th highes priorit unmaske interrup reques i o highe priorit tha th highes priorit biset withi th ISRth interrup contro lin t th CP i se int th activ state I th highes priorit unmaske interrup reques i no o highe priorit tha th highes priorit bi with㐞 i th ISR n furthe actio take place Th priorit o th interrup request i determine b th priorit mod selected. Providin th softwar controlle interrupt-enable fla o th CP i enabled th CP acknowledge th interrupt b issuin tw Interrup Acknowledg pulse (INT pulses t th PIC vi th 828 Bu Controller Th firs INT puls latche th highes priorit interrup reques fro th IR throug t th ISR Th secon INT puls enable v㐞 ectorin dat associate wit th highes priorit bi withi th IS ont th syste dat bus Th vectorin dat (designate a interrup number i singl softwar define byte whic i use b th CP t specif th addres locatio o th correspondin servic routine O completio o th servic routine th associate IS bi withi th Interrup Servic Registe i rese unde softwar control Interrupt Masking Maskin an o th interrup reque㐞 st i achieve unde softwar contro b utilisin thir interna 8-bi registe locate withi th PIC know a th Interrup Mas Registe (IMR) Th 8-bit withi th IM directl correspon t th 8- bit withi th Interrup Reques Register Settin n IMҠ bi prevent th PI actionin an activ stat o th associate interrup reques line. PROGRAMMING CONSIDERATIONS General Befor th PIà ca operat normall withi th processin system㐞 i ha t b initialize wit serie o comman word whic defin th require operatin mode th vectorin dat an th initia priorit o th interrup reques inputs. Onc initialised th operatio o th PI ca b modifie an controlled by a second series of command words which: (aEnable th interruprequesline tbindividuall masked. (b Allo th IS bit withi th Interrup Servic Registe t b cleare a th en㐞 o a interrup servic routine (c Enabl th priorit o th interrup reques line t be changed. (d Allow th statu o th bit of th thre interna register withi th PIà (IRR, ISҠ anIMR t b analyzed. Th firs serie o comman word ar calle Initializatio Command Words and the second series, Operational Command Words. Initialization Command Words Thre Initializatio Comman Word (IC㐞 Ws ar require t se th PI int a initia operatin condition Th thre word hav t b issue i fixe sequence an i an change t th initia operatin conditio ar required th whol sequenc must b reprogrammed Onc initialized; th priorit o th interrup request ar automaticall assigne fro IR (highes priority throug t IR (lowes priority) th PI i abl t accep interrup request Th initializatio programmin sequenc i ICW 㐞 first ICW next an finall ICW4 ICW i no require sinc th syste operate usin singl PIC. ICW define tw parameter whe th PI i use wit a 808 CPU Thes ar a follows (aTh wa th PI sense a activ interrup reques (either edge or level sensitive interrupt request). (b) Whethe ther i mor tha on PI operatin withi the processing environment. Du t th fac tha th tw interrup reques line f㐞 ro th Expansio Slot ar connecte t bot Expansio Slot (i effec i wire-ORe fashion) th leve sensitiv interrup mod mus b adopted (I th edg sensitiv mode transitio o a interrup reques lin fro devic connecte t on o th Expansio Slot woul b undetecte b th PIC i th interrup reques lin i alread raise t logi hig b devic connecte t th secon Expansio Slot) Sinc th PI ha t respon t leve sen㐞 sitiv interrup reques an ther i onl on PIC th forma o ICW i fixe a detaile below Th addres locatio ICW i writte to i 00 i th syste input/outpu space. D7 D0 x x x 1 1 x 1 1 ICW1 indicatethathlogi state is immaterial program to zero. Th functio o ICW i t defin bas addres fo th interrup number Thi i signifie㐞 b fiv bit withi th contro word Th thre othe bit require t for th whol interrup numbe (th leas significan bit - LSB ar automaticall inserte b th PI an ar dependen o th interrup reques lin a detaile below IR T2 T1 T0 0 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 㐞 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 T* = Interrupt Number bit Th bas addres o th eigh interrup number assigne t th PI i 50 a define b th ICW forma below Th I/Ϡ addres locatio ICW i writte to i 02. T7 T6 T5 T4 T3 0 1 0 1 㐞 0 x x x ICW2 Th interrup numbe associate wit eac interrup reques lin i generate b combinin th bas addres (th mos significan bits - MS  o th interrup number wit th bit automaticall inserte b th PI (th 3LSB) Thi assign th followin interrup number t th interrup reques lines. IR Input Type Vector 0 IOP SINTR1 50H 1 㐞 IOP SINTR2 51H 2 INT2 52H 3 INT3 53H 4 FDC INT 54H 5 SIO INT 55H 6 TMR OUT0 56H 7 NDP INT 57H .pa Th majorit o th feature provide b ICW ar fo us wit system utilisin mor tha on PI an therefor no relevan t th singl PI environmen operate o th Syste㐞 Board Th comman wor stil ha t b issued t provid th PI wit th following information: (a) The associated CPU is an 8086 device. (b Terminatio o a interrup servic routin i t b signifie b softwar usin a Operationa Contro Word an no b th automati en o interrup facilit (AEOI,available durin砠 th堠 hardwar堠 interrup acknowledg cycle (AEO i onl suitabl㐞 fo system wit interrupt whic occu a predetermine rate). Th require forma fo ICW i a detaile belo an i writte t th addres locatio 02 i th syste input/outpu space. 0 0 0 0 0 x 0 1 ICW4 Operational Command Words Afte initializatio th interrup reques line ar al operativ wit decreasin orde o priorit fro IR throug t IR (i.e IR highes priority IR lowest) Th operati㐞 o o th PIà ca the b furthe controlle o modifie usin an on o thre Operationa Contro Word (OCW1 OCW o OCW3) Th OCW ar no dependen o eac othe an ca b issue a an tim durin progra execution OCW provide th facilit fo enabling/disablin individua interrupreques line. This i achieve b issuin th contro wor t th 8-bi Interrup Mas Registe (IMR withi th PIC Th addres locatio o th IMҠ i 02Ƞ withi㐞 th syste input/outpu space and the format of OCW1 is as follows. M7 M6 M5 M4 M3 M2 M1 M0 OCW1 Eac bi withi th IM directl correspond t a interrup reques lin (M o th IM affect IR0 M o th IMҠ affect IR1 M affect IR etc.). Interrup reques line ar disable (masked whe th correspondin bi withi th IM i se t logi high an enable (no masked) whe th correspondin bi i se t 㐞 logi low Th statu o th bit withi th mas registe ca als b rea b th programme a addres locatio 02 withi th I/ space. OCW i dua purpos contro word whic allow th priorit o th interrup request assigne durin th initializatio sequenc t b altered an i als use t infor th PIà tha a interrup servic routin i terminating Th facilitie provide b OCW fo alterin th priorit o th interrup request 㐞 ar no required sinc th actua hardwar IҠ connection hav bee mad o th basi o th priorit assigne durin th initializatio routine. Th forma o OCW, use t infor th PI tha th interrup servic routin i a a en (enablin th PIà t rese th associate IS bi withi th Interrup Servic Register) i a detaile below Th addres locatio OCW is written toi 00 within the I/O space. 0 0 1 0 0 x x x 㐞 OCW2 OCW i comman wor whic provide mor facilitie t alte th priorit o th interrup reques lines an als allow th statu o tw interna register withi th PIC th Interrup Reques Registe (IRR an th Interrup Servic Registe(ISR, t b checked Facilitie fo alterin th priorit o th interrup reques line ar no require a explaine above. T rea eithe o th tw register require tw operation t b carrie out w㐞 rit operatio usin OCW t selec th register followe b rea operatio t acces th dat withi th register Th forma o OCW t selec th register i detaile below Th addres locatio o OCW i 00 withi th I/ space Th addres location th registe dat i rea fro i als 00 withi th syste input/outpu space. x 0 0 0 1 0 1 RIS OCW3 1 - Read ISR 㐞 0 - Read IRR  Th forma o OCW t selec th register i detaile below Th addres locatio o OCW i 00 withi th I/ space Th addres location th registe dat i rea fro i als 00 withi th syste input/outpu space. x 0 0 0 1 0 1 RIS OCW3 1 - Read ISR 㐞 .HE OPTIONS .FO # OPTIONS Lis o Contents Page INTRODUCTION 2 FLOPPY DISK OPTIONS 2 128KBYTE RAM EXPANSION BOARD 2 MODEM 㐞 3 NUMERIC DATA PROCESSOR 3 .PA INTRODUCTION NOTE Al option ar installe internall withi th Apricot Thi tas mus onl b undertake b qualifie deale o trained service engineer. Th basi configuratio o th Aprico Compute ca b altered b th additio o variou hardwar option t reflec th differin㐞 requirement o th user Thes hardwar option ar liste beloan describe i greater detai i subsequen paragraphs (a Flopp dis driv options Thes includ th additio o secon 3. inc dis driv an als utilisin 3. inc dis drive whic us MicrFlopp disk wit tota storag capacit o 72 kbyte o formatte data. (b) 128 kbyte RAM expansion boards. (c) Modem. (d) Numeric Data Processo㐞 r. FLOPPY DISK OPTIONS secon 3. inc flopp dis driv whic use singl side disk wit storag capacit o 31 kbyte o formatte dat ca b fitte int th Syste Uni withou an modificatio t th existin hardware t provid dua MicroFlopp dis driv system Eac dis ha 7 track an i soft-sectore employin th IB͠ syste 3 forma i th doubl densit mod wit 51 byte pe secto an sector pe track A alternativ㐞 versio o th 3. inc flopp dis driv ca b installe withi th Syste Unit a direc replacemen fo th flopp dis drive describe above Thi alternativ provide a increas i th siz o th flopp dis storag spac available Th alternativ versio use 8 trac doubl side disk (i.e 16 track pe disk an als employ th sam format mod an secto siz a detaile above Eac dis ha th capacit t stor 72 kbyte o formatte data producin 㐞 correspondin increas i tota dis capacit fo dua MicroFlopp dis driv syste t 1.4 Mbytes 128KBYTE RAM EXPANSION BOARD Th 12 kbyt RA Expansio Boar fit int th expansio slot withi th Syste Unit Bot expansio slot ca accommodat th RA͠ board thu providin a increas i th siz o th RA withi th Aprico t eithe 38 kbyte (on board) o 51 kbyte (tw boards) .pa MODEM Th Mode optio i communication facilit㐞 t allo a Aprico compute t transmi an receiv dat vi th Publi Switche Telephon Networ (PSTN) Th optio i installe withi th Aprico b insertin th Mode Boar int on o th expansio slot an makin mino modificatio t th rea pane o th Syste Uni t accommodat smal connecto panel Mounte o th connecto pane is "flyin lead terminate wit serie 60 plu fo connectin th Aprico t th PSTN an serie 60 㐞socke t reconnec th telephone. Th Mode Boar consist o mode an microprocesso contro system Th mode conform t bot CCIT V2 an V2 standard an operate i an on o th followin softwar selectabl modes: (a) Full duplex 1200/75 bps. (b) Full duplex 300/300 bps. (c) Half duplex 1200/1200 bps. Th microprocesso contro syste act a th interfac betwee th mode an th syste processin element o th Syst㐞e Board an als provide th Aprico wit a autodialle facility Telephon堠 number ar "dialled vi th Aprico keyboard transferre t th microprocesso contro syste o th Mode Boar an retaine i it interna memory Automati diallin o th numbe store i mode memory i performe unde th contro o th Mode microprocessor NUMERIC DATA PROCESSOR ThNumeriDat Processo (NDP optio i aInte 8087 16-bi microprocesso whic ca b 㐞fitte ont th Syste Boar withi th Syste Uni t exten th processin capabilitie o th Aprico i mathematica an scientifi applications Th NDР i simpl plug-i ite whic fit int socke alread provide o th Syste Board. Th ND act a co-processo t th 808 centra processin uni (CPU) an fit int th loca multiprocessin configuratio o th Syste BoardI effec, th ND provide a extensio o th instructio se o th CPU allowin㐞 th Aprico t perfor arithmeti computation an compariso operation o numeri type o varyin siz fro 1 t 8 bits I additio t arithmeti an compariso operations th NDР als execute numerou transcendenta function tangents, logarithms etc.).n configuratio o th Syste BoardI effec, th ND provide a extensio o th instructio se o th CPU allowin㐞.HE CRT CONTROL .OP .FO # CRT CONTROL Page INTRODUCTION  2 DESCRIPTION 2 General 2 Mode Select㐞ion 8 CRTC DETAIL 9 General 9 Register Description 11 Initialising the CRTC 14 CRTC Connections 15 SCREEN RAM 16 General 㐞 16 Text Mode 17 Graphics Mode 19 SYSTEM RAM UTILISATION 19 General 19 Text Mode 20 Graphics Mode 21 DISPLAY UNIT CONNECTOR DETAIL 21 List of Illustra㐞tions Figure CRT control circuitry block diagram 1 CRTC block diagram 2 Text Screen 3 Graphics Screen 4 .PA INTRODUCTION Th CRԠ Contro circuitr i locate o th Syste Boar an provide th interfac fo displayin tex o graphic o th scree o hig re㐞solutio monochrom displa unit. I th tex mod o operatio (alphanumerics) displa are o 8 character b 2 line i available usin characte cel o 1 pixel wid b 1 pixel high Th character fo displa ar accesse fro characte fon loade b th BIO int th Syste RAM Eac characte ca b modifie usin serie o programmabl displa attributes Thes allo scree character t b i eithe norma o revers vide wit th additio o an 㐞 combinatio o th followin displa features a required: (a) Highlight (High intensity characters). (b Strikethroug (Horizonta lin throug th centr o the character). (c) Underline. (Horizontal line under the character). I th graphic mode th scree i memory-mappe directl int th Syste RA͠ (i.e eac individua pixe o th scree correspond t bi writte int th Syste RAM) Th resolutio o th scree availabl i thi㐞 mod i 80 pixel wid b 40 pixel high requirin jus unde 4 Kbytes (80 40 bits o Syste memor t ma ever pixel Al informatio displaye o th scree i generate usin raste sca imagin system wit th CRԠ contro circuitr providin th vide driv signal an th synchronisin pulse t contro th movemen o th CR electro beam Connection t th Displa Uni ar supplie vi 9-pi mal D-typ connecto locate a th rea o th Sys㐞te Unit. DESCRIPTION General simplifie vie o th CR contro circuitr i illustrate i th bloc diagra Figur 1 whic i use i th followin paragraph t provid a introductio t th principle involve i generatin th vide signa fo th tw differen displa modes Subsequen section o th chapte explai th operatio o th circuitr i mor detail. Th bloc diagra i effect present th vie o th circuitr a see fro th CR Cont㐞rolle (CRTC) an i simplifie b th omissio of: (a Th syste data/address/contro bu connection t th Scree an Syste RA. (b Th memor contentio circuitr which determines whe th CRT i allowe acces t th Scree an Syste RA an whe th processor hav access. (c Th peripheral dat bus syste addres an contro bu connection t th CRTC. (d) A fe ancillary contro connections 㐞 Figur 1 CR contro circuitr bloc diagram Th displa raste o th scree o th Displa Uni i controlle b th tw output fro th CRTC HSyn an VSync Hsyn control th horizonta movemen o th electro bea acros th screen Vsyn control th vertica retrac o th bea bac t th to o th scree a th en o th displa period. A t㐞h electro bea scan acros th scree (i.e durin th activ lin period) th CR circui supplie seria vide signa t th Displa Unit Th vide signa modulate th electro bea t produc th displa informatio o th screen Th metho o generatin th vide signa i detaile i th following paragraphs. Th CRTà generate addresse (refres addresse an raste addresses durin th activ sca lin period whic acces dat store i th 㐞 tw area o RAM Th sam sequenc o addresse ar automaticall repeate a th scree refres rat (i.e fram rate). Th CRT addresse als ma th tex character/graphic cel positio o th screen Eac tex characte o th scree i bounde withi 1 b 1 pixe characte cell graphic cel i define a a are 1 pixel wid b 1 pixel hig o th screen. Th firs refres addres generate b th CRT a th star o eac ne fram perio (i.e 㐞afte th vertica retrac period) correspond t th firs character/graphic cel positio o th screen th secon refres addres correspond t th secon cel positio o th screen etc. a illustrate i Figurs 2 and 3. Th refres addres change ever cell perio durin th activ sca lin period bu repeat th sam sequenc o addresse ove 1 adjacen sca lines Th raste addres change ever sca lin bu repeat th sam sequenc ever 1 sca line an㐞 define th ro o eac character/graphic cel displaye o th screen Th dat accesse fro th Scree RA͠ an Syste RA͠ i dependen o th mod o operatio selected. I tex mode th Scree RA i programme wit 16-bi words eac wor consistin o 11-bi fon pointe an 5-bi attribut code Th fon pointe specifie th characte fo displa an i combine wit th raste addres fro th CRTà t acces eac ro o th characte store 㐞i th Syste RAM Th attribut cod i supplie t th vide interfac t determin th displa attribute o th characte accesse fro th Syste RAM. bit 15 11 10 0 attributes font pointer 16-Bit Word in Screen RAM fon pointe raste addres fon cel address Th characte dat i th Syste RA i store i characte fon consistin o 㐞25 characters Eac characte consist o 3 byte i contiguou memor location an i organise a 1 row o 16-bi word (define a fon cell) Withi eac ro o th fon cell onl th 1 LS compris th actua character Th MS ar no displaye o th screen. Th 1 characte bit fro eac ro ar latche int th vide shif register converte int seria forma an the shifte ou t th vide interfac circuitr a th do cloc frequency. Th vide interf㐞ac modifie th seria dat accordin t th attribut cod (e.g invert th seria dat stream i revers vide i selected) an the supplie th vide signa t th Displa Unit. I graphic mode th Scree RA i programme wit 16-bi words o whic th 1 LS ar graphic pointer Th remainin 5-bit o eac wor ar redundant sinc attribute ar no use i th graphic mode Th graphic pointe i combine wit th raste addres fro th CRT t acce㐞s eac ro o th 16-bi graphic cel imag writte int th Syste RAM bit 15 11 10 0 not used graphics pointer 16-Bit Word in Screen RAM graphics raste graphics cel pointer address image address Eac graphic cel imag consist o 3 byte o dat i contiguou memor location an i organise a 1 row o 16-bi words Eac pixe o th scree i mappe dire㐞ctl b correspondin bi withi eac 16-bi ro o th graphic cel image. Th ful 16-bit fro eac ro ar latche int th vide shif register converte int seria forma an the shifte ou t th vide interfac a th do cloc frequency Th vide interface then supplies the video signal to the Display Unit. Unlik th tex mode wher th Scree RA ha t b update wit ne fon pointe an attribut bit t specif differen characte f㐞o displa o th screen th graphic pointer remai unchange onc programme int th Scree RAM Changin th displa o th scree i graphic mod i achieve b updatin th imag o th graphic cel store i th Syste RAM Figure 2. Text Screen 㐞  Figure 3. Graphics Screen Mod Selection Whethe th circuitr operate i th tex (alphanumerics o graphic mod depends on: (a Th logi stat o th mode select lin alpha/graphics fro th Paralle Interface whic i directl unde softwar control (b) The initialisation of the CRTC. (c) The data programmed into the Screen RAM. (d) The data programmed into the System RAM. Th mod㐞 selec lin affect tw differen area o th circuitry th timin generato an th vide interface Th effec produce o th timin generato i t chang th frequenc o th tw signals CCL (characte clock supplie t th CRTC an LE (loa data supplie t th shif register CCLˠ i th basi timin signa use b th CRT an define th rat a whic th refres addresse change an thu th characte widt o th screen Th cloc freq㐞uenc i derive fro th 1 MH do clock I th tex mode th timin generato divide th do cloc b 1 (1 pixe widt tex cell refres addresse chang a frequenc o 1. MH durin th activ sca period) I th graphic mode th do cloc i divide b 1 (1 pixe widt graphic cell refres addresse chang a frequenc o 15/1 MH durin th activ sca period) LE control th loadin o th 16-bi dat fro th Syste RA int th sh㐞if register Th shif registe move th dat ou o th registe a th 1 MH do cloc frequency I th tex mode th frequenc o LE i 1. MHz s tha ever tim 1 bit ar shifte ou o th registe ne 16-bi characte ro i loade i (I th tex mod onl th 1 LS o th 16-bi dat ar use fo display) I th graphic mode th frequenc o LE i 15/1 MHz s tha th ful 16-bit o dat ar shifte ou o th shif register befor ne 16-bi graphi㐞c cel ro i loade in. O th vide interface th mod contro lin determine whethe th attribut bit an curso contro signa ar enable o disabled Th attribut bit an curso contro signa ar enabled in the text mode, disabled in graphics. .pa CRTC DETAIL General Th basi o th CR contro circui i th Motorol MC684 CR Controlle (CRTC) Onc initialise wit operationa parameter fo th Displa Uni (sca lin rate fram rate㐞 mode etc.) th CRTC: (aAutomaticall an repetitivel generate addresse whic acces dat fro th Syste Ra t refres th scree o th display (b Generate horizonta (line an vertica (field syn pulse fo controllin th scannin o th electro bea acros th screen. (c Generate a outpu signa whic define th activ displa period of the screen. (d Allow th so㐞ftwar t contro th movemen o curso (i th tex mod only an als scrol th screen. Figure 4. CRTC block diagram Th refres addresse generate b th CRT ar o tw types refres addres line (MA t MA10) an raste addres line (RA t RA4) Th refres addres line acces th dat store i th Scree RA͠ (th fon cel pointe plu th㐞 characte attribute i th tex mode/th graphic cel pointe i graphic mode). Th raste addres line ar combine wit th pointe t acces th Syste RA t selec th ro o th font/graphic cell fo display Th CRT i programme t operat i raste sca mod define a interlac syn an video I thi mode th displa raste o th scree i generate usin tw fields a eve fiel an a od field consistin o eve an od sca line resp㐞ectively (Simila t th metho employe withi standar domesti television) Hal th row o eac font/graphic cel ar displaye i eac field. I th eve field a th electro bea sweep ou th eve sca lines th eve row o font/graphic cel ar accesse fo displayin o th screen I th od field a th electro bea sweep ou th od sca lines th od row o font/graphic cel ar accessse fo displayin o th screen㐞  Eac蠠 fram o vide informatio i thu define b tw consecutive fields. Th movemen o th electro bea acros th scree i controlle b th tw output fro th CRTC Hsyn an Vsync Hsyn control th horizonta swee o th bea acros th scree durin eac fiel (lin sca rate) Vsyn control th vertica retrac o th bea bac t th to o th scree a th en o eac fiel (fiel rate) Th activ displa perio o th 㐞scree i indicate b th Displa Enabl (DE output whic i supplie t th vide interface memor contro circuits an th Paralle Interface O th vide interface th D signa enable th vide signa outpu durin th activ periods an inhibit th outpu durin lin an fiel flybac periods Th D outpu i als use a a enable/inhibi signa fo th memor contro circuits Durin th activ displa period th scree addres (cel pointe combin㐞e wit raste addres lines an th processor ar allowe acces t th Syste memory Durin th flybac periods th processor ar stil allowe access bu th scree addres i inhibite an th memor contro refres counte enabled Th refres counte provide addresse t perfor th hardwar refres o th Syste memor dynami RAMs Supplyin th D signa t th Paralle Interfac enable th processors to detect the active and flyback periods㐞 as required. .pa Curso movemen i th tex mode i controlle b changin th content o pai o register withi th CRTC whic specif th curso positio o th screen Th curso i displaye b th CRTC supplyin curso displa signa (cursor t th vide interfac a th electro bea sweep th require curso characte positio o th screen I graphic mode th curso displa signa i inhibite at th vide interface Th CRT contain㐞 pai o register whic defin th heigh o th tex cursor an als provid a optiona facilit t allo th curso t blin a on o tw differen rates Th widt o th tex curso i fixe an correspond t th widt o characte cel (1 pixels) Scrollin o th scree i achieve b writin differen star addres int anothe pai o register locate internall withi th CRTC Th star addres i th firs refres memor addres t b sup㐞plie t th Scree RAM a th star o eac field period Th CRT als provide facilit t connec ligh pe wit it associate contro electronics fo detectin th electro bea a i scan acros te screen. NOTE Th standar inc gree o blac Aprico Displa Uni utilise lon persistenc phospho (P39) whic ma no suppor the use of ligh pe interface. Internall th CRTà consist o collectio o register㐞s counter an comparators whic tim al th logi activitie (generatio o addresses sync pulses etc. a th interlace raste sca proceeds Th basi cloc frequenc use b th counter i CCL (Characte Clock supplie fro th timin generato circuit Th perio o CCLK i dependen o th mod selected an correspond t th displa tim o th characte cel i eac sca line CCLK i derive fro th 1 MH do clock I th tex mode 㐞CCLK i produce b dividin th do cloc b 1 (correspondin t 1 pixel pe characte cell) I th graphic mode CCLK i produce b dividin th do cloc b 1 (correspondin t 1 pixel pe graphics cell) Othe register withi th CRT ar programme wit dat fo controllin th operatio o th counter t determin variou parameter fo th Displa Uni (e.g activ lin period vertica retrac perio etc.) definitio o eac o㐞 th register i provide below. Register Description Th CRTà contain 1 registers 1 o th register ar programme wit operationa parameter t matc th Displa Uni t th selecte scree forma (tex o graphics) Fou o th remainin register ar involve wit th tex cursor Tw o thes register specif th forma o th cursor th othe tw defin th curso positio o th screen Th star addres account fo anothe two Tw re㐞 gister ar use t stor th positio o ligh pen Th remainin registe i programme wit pointe whic specifie th addres locatio o th othe registers summar o th register i provide below Thi i followe b detaile descriptio o eac individua register. AR Address Register R9 Max scan line address R0 Horizontal Total R10 Cursor format (start) R1 Horizontal Displayed R11 Cursor format (end) 㐞 R2 HSync Position R12 Start Address (H) R3 Hsync Width R13 Start Address (L) R4 Vertical Total R14 Cursor Position (H) R5 V. Total Adjust R15 Cursor Position (L) R6 Vertical Displayed R16 Light Pen (H) R7 VSync Position R1 LighPe(L R InterlacMod堠 Addres Register 5-bi registe locate a 68 i th syste I/ 㐞 spac an ca b writte t only Act a th pointe fo th othe contro registers Prio t an dat transfe betwee th processor an䠠 an o th堠 1 contro젠 registers th source/destinatio registe ha t b define b programmin th addres registe wit th addres pointer Th pointe fo eac contro registe i th binar equivalen o th decima "R number e.g Interlac Mod contro registe R i specifie b programmin th addres registe w㐞it 08H. Horizonta Tota Registe (R0). Th content o thi registe determin th lin frequenc o th HSyn outpu an i specifie i CCLˠ periods Th actua numbe i equivalen t th tota numbe o characte period i th activ sca lin tim an th lin retrac perio minu on (activ retrac - characte periods). HorizontaDisplaye Registe (R1). Thi registe specifie th numbe o character displaye o eac sca line. HSyn Positio Regi㐞ste (R2). Th content o thi registe specif th positio o th horizonta syn puls relativ t th star o th activ sca lin period Th valu i programme i CCLˠ periods Th effec o increasin th valu i R i t shif al character displaye o th scree t th left Decreasin th valu shift th whol characte displa t th right HSyn Widt Registe (R3). Th content o R se th widt o th Hsync pulse in units of the char㐞acter clock period. .pa VerticaTota Registe (R4). Thi registe wit R defin th frequenc o th VSyn pulses R i programme wit value i characte ro period (i.e 1 sca lin periods) jus les tha th desire frequency Th fin adjustmen t achiev th exac VSyn frequenc i provide b R5 Th actua valu o R i on les tha th desire numbe o characte ro periods VerticaTota Adjus Registe (R5). Thi registe provide th fin con㐞tro o th frequenc o VSyn an i programme i sca line periods. Vertica Displaye Registe (R6) Th content o thi registe determin th numbe o displaye characte row o th screen VSyn Positio Registe (R7). Th content o thi registe specif th positio o th vertica syn puls relativ t th star o th firs activ sca lin period Th valu i programme i Characte ro periods Increasin th valu i R shift th whol dis㐞pla o th scree upwards Decreasin th value shifts the display downwards. Interlac Mod Registe (R8) Thi registe selects thrastr sca mode choic o non-interlac (00H) interlac (01H) o interlac syn an vide (03H mode ar available I th non- interlac mode th sca line ar refreshe a th fram rate I th tw interlac modes th fram i divide int tw fields a od fiel an a eve field I th interlac mode th sam informatio i d㐞isplaye i bot fields I interlac syn an video th eve line o characte are displaye i th eve field an th od line i th od field. Ma Sca Lin Addres Registe (R9) Thi registe determine th numbe o sca line pe characte ro an i programme wit number one less than the desired value. Curso Forma (Start Registe (R10) Th content o R1 wit th content o R1 specif th heigh an positio o th tex curso withi th boundar㐞 ie o th characte cell R1 als select th curso displa mode Th lowe bit o R1 specif th star addres o th curso withi th characte cel an i valu correspondin t raste ro address Bit an determine the cursor display mode as detailed below. bit 7 bit 6 Cursor Display Mode 0 0 Non-blinking 0 1 Non-display 1 0 Blinking, 1/16th field rate 㐞 1 1 Blinking, 1/32nd field rate CursoForma (End Registe (R11) Thi registe set th en addres o th curso withi th characte cel an i valu correspondin t raste ro addres eithe highe o th sam value as the cursor format start address Star Addres Registe (R12) Th content o thi registe wit th content o R1 defin th firs refres addres o eac ne fram period R1 i programme wit th mos significan bit㐞 o 14-bi word Th leas significan bit ar provide b R13 Start Address Register (R13). See R12 above. CursoPositio Register (R14) Th content o thi registe wit th content o R1 defin th positio o th tex curso o th screen R1 i programme wit th mos significan bit o 14-bi word correspondin t refres addres value Th leas significan bit ar provide b R15 Bot register R1 an R1 ca b writte t an rea from.㐞 Cursor Position Register (R15). See R14 on the previous page. Ligh PeRegiste (R16). Whe positiv edg occur o th LPST  inpu o th CRTC th curren refres addres i latche int th tw register R1 an R17 t defin th positio o th ligh pe o th screen R1 store th mos significan bit o th 14-bi addres an R1 th leas significan bits Th positio o th ligh pe i the determine b readin th content o thes registers.㐞 Light Pen Register (R17). See R16 above. ------------------- Initialising the CRTC Th value supplie t th contro register t initialis th CRT t operat wit th standar inc monochrom Displa Uni fo th tw differen displa mode ar detaile below Th contro register ar programme usin tw separat堠 writ operations Th firs writ i t addres locatio 68 i th syste input/outpu spac (th addres register㐞 t specif th contro registe pointe address Th secon writ i t addres locatio 6A i th syste input/outpu space whic load th valu int th contro register, specified by the pointer. REGISTER TEXT GRAPHICS REGISTER TEXT GRAPHICS (Hex) (Hex) (Hex) (Hex) R0 5E 3B R8 03 03 R1 50 32 R9 0E 0E R2 4F 㐞 30 R10 00 00 R3 0C 0C R11 0F 0F R4 19 19 R12 00 00 R5 0A 0A R13 00 00 R6 19 19 R14 00 00 R7 19 19 R15 00 00 CRTC Connections D t D Dat bus Use t transfe dat betwee th interna registers of the CRTC and the p㐞rocessor. R/ Read/writ contro inpu connecte t th DT/ contro lin o th syste contro bus Use i conjunctio wit CS R an t contro dat transfer betwee th CRTà an th processors R/נ determine th directio o dat transfer logi hig fro th CRT (read), logic low to the CRTC (write). C Chi Select Addres input Activ state logi low Whe activ indicate th㐞a th CRT i selecte fo data transfer operation. R Registe Select Inpu connecte t A o th syste addres bus Use t selec eithe th addres registe (logi low o on o th eightee contro registers (logic high). Š Enabl input Dat strob signa fo latchin dat to/fro th peripheral dat bus Logi hig t lo transitio a th en o th secon processo clo㐞 c cycle after the address is valid. RES Inpu signa t rese th CRTC Activ state logi low Generate b th Paralle Interface Whe active, al counter withi th CRT ar cleare an al output ar force t logi low Th content o th registers are unaffected. CCL Characte clockInpu signa fro th timin circuit wit 50 dut cyclederive fro th 1 MH do 㐞 clockUse a th basi CRT timin signal I tex mode th frequenc i 1. MHz I graphics 937. kHz MA Refres memor addres signals Addres outputs which t chang ever characte cloc perio durin th active MA10 sca lin perio t acces th Scree RA͠ an thus refresh the CRT screen. RA Raste addres signals Addres line t th Syste to RAM tselec ro withi ch㐞aracte font cell tb RA displaye i tex mode ro withi th graphic cel image in the graphics mode. VSYNà Syn pulse supplie t th Displa Uni t contro th retrac othelectrobeabac tth堠to o thscree a thenoeac activ堠 fiel䠠 period Pulses are generate a rat o approximatel 7 Hz. .pa HSYNà Syn pulse supplie t th Displa Uni㐞 t contro th horizonta swee o th bea acros th scree durin th activ fiel period Th pulse ar generated at a scan rate of 15.79 kHz. Displa Outpu generate b th CRT whic define th activ Enabl sca line/retrac period o th electro beam Logi hig indicate th activ periods logi lo th retrac periods Supplie t th Paralle Interface the video i㐞nterface and the memory control circuits. Curso Outpu signa supplie t th vide interface use t contro th curso o th scree i th tex mode Ever tim th CRT produce refres addres whic matche th curso addres programme int contro register R1 an R15 th curso outpu i se t logi high producin positiv goin puls fo on CCL period. LPST Ligh㐞 Pe Strob input Connecte t Mole connecto (LP o th Syste Board Allow ligh pe an associate contro circuitr o simila devic t b connecte t th CRTC Ever tim positiv edg i generate o thi input th curren refres addres i latche int contro registers R16 and R17. SCREEN RAM General Th Scree RA consist o tw 2 bi stati RAM arrange in 2 1 bi㐞 bloc an occupie Kbytes i th syste memor spac a addres locatio F0000 t FOFFF (204 16-bit words) Th RA i dua por memory bein abl t b accesse b bot th processor an th CRTC Acces t th RA i controlle b memor contentio circuit Th memor contentio circui guarantee th CRT acces t th RA onc ever characte cloc perio t refres th screen Wai state ar automaticall adde t th processo memor cycle i th processor㐞 attemp t acces th RAM durin CRT acces ( t wai state i tex mode t wai state i graphics) Th 16-bi word programme int th Scree RA ar accesse b th refres addresse fro th CRTC Thes addresse ar incremente ever characte cloc perio durin th activ sca lin perio bu repea th sam sequenc o addresse ove sixtee adjacen sca line (a illustrate i Figure an 3) Th CRTà automaticall cycle throug th㐞 sam sequenc o addresse eac scree refres period unles th CRTà star addres i updated .pa I th tex mode th CRT i programme t cycl throug 200 differen refres addresse t ma th whol tex scree o 2 line o 8 characters Thes repetitivel acces th 16-bi word programme int th firs 200 wor addres location i th Scree RAM I th graphic mode th CRT i programme t cycl throug 125 differen refres addresse t㐞  ma th whol graphic scree o 5 column b 2 rows Thes repetitivel acces th 16-bi word programme int th firs 125 wor addres location i th Scree RAM Th 16-bi dat programme int th Scree RA i dependen o th selecte mode Text Mode I th tex mode th Scree RA i programme wit 16-bi words eac wor consistin o 11-bi fon pointe an 5-bi attribut code Th fon pointe i use t selec character store i㐞 th Syste RAM Th attribut cod i supplie t th vide interfac t determin th displa attribute o th characte accesse fro th font Changin characte o th scree i achieve b writin differen 16-bi wor int th appropriate address location of the Screen RAM. Th 1 leas significan bit o th 16-bi wor (D t D10 i th Scree RA ar th fon pointer Th 1 bit o th fon pointe ar combine wit th raste addres line fro th㐞 CRT t for wor address t acces characte ro i th Syste RA͠ (Th 11-bit ar shifte binar place i significanc t bit t 1 an combine wit th raste address se Syste RA descriptio below) Th attribut bit ar define a follows: D15 D14 D13 D12 D11 Software attribute Strikethrough Underline 㐞 Highlight Reverse Video Softwar Attribut (D11)Thi bi i fo us b application program t mar scree character fo variou displa functions e.g mar th beginnin o line en o bloc o text etc The bit is not used for display generation functions. .pa Strikethroug (D12)Thi bi work i conjunctio wit on o th non-displaye bit withi fon cell㐞 I th strikethroug bi i set horizonta lin i superimpose throug th character a positio determine b bi 1 i th fon cel (se Syste RA description) Underlin (D13) Thi bi work i conjunctio wit on o th non-displaye bit withi fon cell I th underlin bi i set horizonta lin i draw th ful widt o th characte cell underneat th characte a heigh determine b bi 1 in the font cell (see System RAM descri㐞ption). Highligh (D14) I thi bi i set th characte i displaye i hig intensit o th screen I no set th characte i displaye i norma intensity Revers Vide (D15) I thi bi i set th character underlin an strikethroug ar al displaye i revers video (i.e blac characte o gree background) I no set th characte i displaye䠠 i norma vide (gree characte o ᠠ blac background). ----------------㐞---- Th positio o th selecte characte o th scree i determine b tw factors th addres locatio o th 16-bi wor i th Scree RA an th star addres programme int th CRTC I th CRT star addres i programme t 0000H th firs characte displaye o th scree i th on selecte b th fon pointe store a wor addres locatio F0000 i th Scree RAM th secon characte displaye o th screen th on selecte b th fon pointe store a㐞 wor addres locatio F0002H th thir character th on selecte b th fon pointe a F0004H etc I th CRTà star addres register ar programme t differen valu tha 0000H th firs characte displaye o th scree i selecte by the pointe store a th addres i th Scree RA͠ correspondin t F0000 twic th CRTà star address th secon characte displayed selecte b pointe store a th Scree addres F000 twic th CRT st㐞ar addres 2 etc. Fo example i th star addres i programme t 0050 (decima 80) th firs characte displaye o th scree i specifie b th pointer store a Scree RA addres F00A0H th secon characte i specifie b th pointe store a Scree RA͠ addres F00A2H etc Du t th cyclica natur o th generatio o th refres addresse fro th CRTC th las characte (th 2000th. displaye o th screen i specifie b th point㐞 e store a Scree RA addres F009EH. .PA Thi exampl illustrate ho scrollin th scree upward b on tex lin i achieved I th CRTà star addres i incremente b 50H th tex lin originall th secon lin i move t th to o th screen an th tex lin originall th firs tex lin i move t th botto o th screen Ne parameter (pointer an attribut bits the ca b issue t th original first text line address locations, as require㐞d. Graphics Mode I th graphic mod th firs 125 wor addres location i th Scree RA ar initialise wit 1 bi words o whic th 1 leas significan bit (LSB ar th 11-bi graphic pointer Th mos significan bit (MSB o th wor ar redundant Th graphic pointe i use t selec graphic cel젠 image programme int th syste RAM Th value o th 11-bi pointer neve nee t b change an sinc th CRT star addres i als neve chan㐞ged th pointer alway acces th sam graphic cel imag a correspondin pixel ar mappe ont th screen SYSTEM RAM UTILISATION General Th utilisatio o th Syste RA b th CR contro circuitr i dependen o th selecte mode I tex mode th BIO allocate spac i th Syste RA fo thre characte fonts defaul fon an tw use specifie fonts Eac fon ha spac fo 25 characters Th defaul fon loade b th BIO fo U use i 㐞 slightl modifie ASCIɠ SINT̠ 0 characte se (strikethroug bi added) Thi occupie Kbytes o syste memor fro addres locatio 0800 t 27FFH Th tw use fon area occup th nex 1 Kbytes o syste memor (2800 t 47FF an 4800 t 67FFH respectively). I th graphic mode 4 Kbytes o th syste memor ar require t ma ever pixe o th 80 40 resolutio screen Th Syste RA allocate t th graphic scree imag i fro 2800Ƞ t㐞 C440H whic mean th tw use font ar alway overwritten when graphics is selected. Th CRԠ contro circuitr i guarantee acces t th Syste RAM onc ever characte cloc perio durin activ displa tim t refres th screen Contentio betwee processo acces t th Syste RA an CR contro acces i manage b th syste memor contro circuits Th contro circuit automaticall ad wai state(s t processo memor cycl i th processor attemp t acc㐞es th RAM durin th CR contro acces period Th numbe o wai state inserte fo tex i fro t 3 fo graphic to 5. .pa Th addres generate b th CR contro circui t acces th Syste RA i produce b offsettin th 11-bi pointe fro th Scree RA b significan place an the combinin th resul wit th 4-bi raste address a detaile below Sinc word ar accesse fro th RAM th LS i hel permanentl a th lo stat b hardwire conn㐞ection Th MS ar als alway lo sinc th area t b accesse ar withi th botto 64K o th syste memor map. address bit 19 15 4 0 0 0 0 0 p p p p p p p p p p p r r r r 0 11-bit Pointer Raster Address Text Mode I th tex mode eac characte fo displa i store i 3 contigu㐞ou byte i memory organise a 1 consecutiv 16-bi words define a fon cell A exampl o fon cel i detaile below Thi represent th characte A (o th defaul font a illustrate o Figur 2. 16-bit WORD D0 D15 1020H 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 㐞1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0   0 0 0 0 WORD 0 1 1 0 0 0 0 1 1 0 0 0 0 0 x 0 - strikethrough ADDRESS 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 bit 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 㐞 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 x - underline 1030H 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 bit Display bits Non-display Th strikethroug bi define th positio o th horizonta lin draw throug th character i th strikethroug attribut i se fo th characte i th Scree RAM Similarly th underlin bi define th positio o th lin draw unde th character, if the 㐞underline attribute is set. Graphics Mode I th graphic mode eac characte fo displa i store i 3 contiguou byte i memory organise a 1 consecutiv 16-bi words define a graphic cel image A exampl o graphic cel imag i detaile below Thi represent th graphic cel a illustrate o Figur 3. 16-bit WORD D0 D15 xxxxH 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 㐞 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 WORD 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRESS 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 㐞0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 xxxxH + 10H 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DISPLAY UNIT CONNECTOR DETAIL Th Displa Uni connect t th Syste Boar vi th 9-pi mal D-typ connecto locate o th rea o th Syste Unit Th matin connecto fro th Displa Uni i attache t 6-wir cabl assembly Th cabl carrie th vide si㐞gnal th horizonta an vertica syn pulses an als provide th +12 suppl voltag fo th Displa Unit Th connection t th D- typ connecto ar a detailed on the next page. .pa Display Unit Connections Pin Description 1 +12V out 2 N.C. 3 0V 4 Horizontal Sync 5 Vertical Sync 6 㐞 Frame Ground 7 N.C. 8 Ground 9 Video signal Bot syn signal ar a standar positiv TT̠ levels Th frequenc o th Horizonta Syn pulse t matc th standar inc Displa Uni i 15.7 kHz th frequenc o th Vertica Syn pulses 7 Hz Th amplitud o th vide signa i fixe a 0.3֠ fo norma intensit video 0.4 fo hig intensity Th maximu curren allowe t b draw f㐞ro th +12 suppl i 1.0A.l Bot syn signal ar a standar positiv TT̠ levels Th frequenc o th Horizonta Syn pulse t matc th standar inc Displa Uni i 15.7 kHz th frequenc o th Vertica Syn pulses 7 Hz Th amplitud o th vide signa i fixe a 0.3֠ fo norma intensit video 0.4 fo hig intensity Th maximu curren allowe t b draw f㐞.HE SYSTEM UNIT .FO # .OP SYSTEM UNIT List of Contents Page INTRODUCTION 2 SYSTEM BOARD 2 DISK DRIVES 㐞 3 POWER SUPPLY DETAILS 3 General 3 DC Supply Distribution 4 Fuse rating 4 PHYSICAL DIMENSIONS 4 List of Illustrations Figure System Unit external detail 㐞  1 System Unit internal detail 2 .pa INTRODUCTION Th Syste Uni i th are o th computer whic house th processors th syste memory dis drive(s) th Powe Suppl Unit coolin fa an al th interfac circuitr fo connectin th Keyboard Displa Uni an othe periphera equipment. Al th electrica an electroni component ar containe internall withi th plasti case shallo re㐞ces a th to o th cas i provide fo th Displa Unit. Th Uni i designe fo eas o transportation incorporatin carryin handl whic slide ou fro underneat th dis drive(s) an slidin cove t preven dus o an othe object enterin th dis driv input durin transit Th Keyboar ca als b carrie attache t th undersid o th Syste Unit utilisin th clip provide o th bas plate. Connector fo th Keyboard th Di㐞spla Unit th main inpu an othe periphera equipmen ar al locate o th rea pane o th System Unit Th connector fro lef t righ whe looking at the rear panel are as follows: 1. The Keyboard connector (9-pin female D-type). 2 parallel printer port (36-wa femal Centronic). 3. An RS232C communications port (25-pin female D-type). 4. The Display Unit connector (9-pin male D-type). Als include o th rea pane i th main㐞 switc an th main inpu fuse Th indicato o th switc i illuminate whe th System Uni i switche on Tw plasti expansio plate ar locate abov th Keyboar connecto o th rea panel Thes ar remove t allo externa equipmen t b connecte t th expansio board wit minimu o modificatio t th rea panel. Al th processin circuitr i containe o singl printe circui board th Syste Board whic fit horizontall int th bas o 㐞th System Unit Locate abov th Syste Boar insid th Unit i th Powe Suppl Unit loudspeake an eithe on o tw dis drives Th coolin fa i attache t th insid o th rea panel SYSTEM BOARD Th Syste Boar incorporates: (a) Th system processors. (b) Th Boo Proms. (c) Thsyste memor (25 kbyte o dynami RAM). (d) TwExpansio Slots. (e Circuitr fo controllin th monochrom Displa 㐞 Unit. (f dua channe Seria Interface on channe fo communicatin wit periphera equipmen vi a RS232 link, one channel for keyboard communications. (g) A Paralle Interfac fo connection to printer. (h) An interface for controlling th disk drive(s). (i) A sophisticate Soun Generator. descriptio o th Syste Boar an al th majo circui element o th boar liste abov ar detaile i subseq㐞uen chapters. DISK DRIVES On o tw dis drive ca b fitte insid th Syste Unit I singl driv system th dis driv i fitte o th lef han sid (a viewe fro th front) Singl driv system ca b upgrade int dua driv syste b addin secon dis driv withou an modificatio t th hardware Th dis drive ar mounte o meta chassi assembl abov th Syste Board an secure i plac b tw pair o screw i eac o th chassi㐞 sid plates Th dis ejec butto an th activit indicato o th dis driv fi throug th fron faci o th Syste Unit Th functio o th dis ejec butto i self-explanatory Th activit indicato i illuminate whe dis rea an writ operation ar i progress an als momentaril whe th dis i firs inserte int th drive. ribbo cabl assembl connect th dis driv t th dis interfac o th Syste Board Regulate powe supplie ar supp㐞lie t th driv fro th Syste Board vi 4-wa cabl assembly. Th standar dis drive us 70-trac singl side MicroFlopp disk wit tota storag capacit o 31 kbyte o formatte data detaile descriptio o thes disk an furthe detail of the disk drives can be found in the Disk Drive section. POWER SUPPLY DETAILS General Th main inpu int th Syste Uni i filtere (b lin filte mounte o th rea panel) an the route vi th in㐞 pu fus an th main switch Switchin th Syste Uni o supplie th main voltag t th powe suppl uni (PSU an operate th main powere coolin fan Th powe suppl uni i o switche mod design providin regulate output o +12V +5 an -12 fo us b th Syste Board th Keyboard th dis drives th Displa Uni an an expansio board fitted Th powe suppl component ar house i shielde case fus i locate i th main inpu line 㐞 internall withi th unit DC Supply Distribution Th regulate output fro th PS ar supplie t th Syste Boar vi 7-wir cabl assembly terminate a bot end i Mole connectors Th PSՠ provide tw separat regulate supplie o +12V singl regulate suppl o +5 an singl regulate suppl o -12V Th maximu curren ratin fo th fou supplie ar detaile below Th "V prefi correspond t pin/numbe o pin o th PS D connecto㐞r. V (+5 supply 6.0 V2 (+12V supply) 1.5A V3 (+12V supply) 2.1A V4 (-12V supply) 0.25A Distributio o th supplie fro th Syste Boar t th othe area ar vi th boar wirin t th appropriat connector Th boar provides: 1. +12V to the Display Unit via the Display Unit connector. 2. +12V and -12V to the Keyboard via the Keyboard connector. 3. +12V, +5V and㐞 -12V to the expansion connectors. 4 +12 an +5 t th dis drive(s vi Mole connector an 4-wire cable assemblies. Fuse rating Th ratin o th fus o th rea pane o th Syste Uni i dependent on the mains input voltage, as detailed below. 240V mains input - T 2A, 20 mm slow blow. 115V mains input - T 3A, 20 mm slow blow. PHYSICAL DIMENSIONS Height: 4.0 inches Width: 16.5 inches Depth: 12.5 inches 㐞 Weight 14. lb (Dua dis driv versio singl dis drive version, 1.5 lbs less). Figure 1. System Unit External Detail Figure 2. System Unit internal detail 㐞.HE APPENDI B .FO # .OP BOOT PROM DIAGNOSTICS Afte power-o reset o followin keyboar rese prio t th insertio o syste disk th boo PRO perform serie o diagnosti check o th syste hardware Afte th firs syste diagnosti checks th scree i initialise t displa th Aprico l㐞og an th word "Testing" I al th diagnosti check pass "Testing i replace b "Syste OK" th RA siz an th promp fo syste dis (dis symbo an flashin arrow) I an o th diagnosti check fail th scree display th RA size th promp fo th syste dis an a Erro number Th Erro numbe indicate whic diagnosti tes failed a detaile i th tabl o th nex page I mor tha on o th test fail th firs failur detecte㐞 i indicate b th erro code. I al th diagnosti check pas an the th syste i unabl t boo syste disk du t detectin a invalid/corrupte dis o dis driv failure th arro stop flashin an a Erro numbe i displaye accordin t th fault Thes ar detaile i th tabl below Remova o th dis cause th dis promp t b resumed bu leave th erro cod displayed FAILURE TO BOOT ERROR CODES Error Err㐞or Possible Cause Number Condition 0 Dis Driv Driv powe failure driv Not Ready moto failure driv no abl t b selected dis remove durin boot 04 CRC Error Corrupt disk data. 0 See Erro Unformatte disk ba trac No i dis I field dis 㐞  driv fault. 07 Bad Media Corrupt disk media block. 0 Secto No Foun Unformatte disk ba secto No i dis IĠ field dis driv fault 11 Bad Read Corrupt data field on disk. 1 ReaFaul 808processor flopp dis controlle (FDC) dis driv 㐞 fault 99 Invalid System Disk Invalid header on disk. DIAGNOSTIC TEST ERROR CODES Error Test Possible Cause Number 20 PROM Checksum Boot PROM Fault 2 SI read/writ Seria input/outpu controller fault. 23 CRTC read/write CRT Controller fault. 24 Screen RAM read/write Screen R㐞AM fault. 25 System RAM read/write System RAM fault. 26 PIO transfer Parallel Port fault. 2 PIà read/writ Interrup Controlle fault. 2 FD read/write/see Dis Controllerdis driv fault 29 TMR read/write Programmable Timer fault. 30 RS232C transfer Z80 SIO channel A fault. 3 Keyboar initialisati㐞oKeyboarfault or Keyboar disconnnecte. 32 TMR accuracy. Programmable Timer fault. 3 TMR/PIà interactio Programmabl Time o Interrup Controller fault. 34 IOP initialisation/ 8089 processor. memory transfer  Programmable Timer fault. 30 RS232C transfer Z80 SIO channel A fault. 3 Keyboar initialisati㐞.HE EXPANSION SLOTS .FO # EXPANSION SLOTS List of Contents Page INTRODUCTION 3 DESCRIPTION 3 Electrical Specification 㐞 3 Pin Detail 4 Address Allocation 8 Expansion Board Layout Detail 8 List of Illustrations Figure Expansion connector block diagram 1 Expansion board detail 2 .pa 㐞 Figure 1. Expansion Connector Pin Definition Pin Description Input/Output AB0 to AB19 20-bit system address bus Output DB0 to DB15 16-bit system data bus Bi-directional BHE Bus High Enable Output ALE Address Latch Enable Output DEN Data Enable 㐞 Output DT/R Data Transmit/Receive Output AMWC Advanced Memory Write Command Output MWTC Memory Write Command Output AIOWC Advanced Input/Output Write Command Output IOWC Input/Output Write Command Output MRD Memor Rea Comman Output IORC Input/Output Read Command Output MRDY Memory Ready 㐞 Input IORDY Input/Output Ready Input RES System Reset Output CLK15 15MHz Clock signal Output CLK5 5MHz Clock signal Output Pin Definition (contd.) Pin Description Input/Output DMA1 DMA Request for DMA Channel 1 Input EXT1 External Terminate for DMA Channel 1 Input D㐞 MA2 DMA Request for DMA Channel 2 Input EXT2 External Terminate for DMA Channel 2 Input INT2 Interrupt Request (Priority 2) Input INT3 Interrupt Request (Priority 3) Input NMI Non-Maskable Interrupt Input +12V System Board supply rail Output -12V " " Output +5V " " Output 㐞 INTRODUCTION Th tw Expansio Slot ar locate o th Syste Boar an provid a extensio o th processin syste fo us b optiona boards. Th sam syste connection ar wire t bot Expansio Slots Th extensio connection wire t th Expansio Slot are (a) The 16-bit system data bus. (b) The 20-bit system address bus. (c) Various control and timing signals. (d) Power supply outputs. DESCRIPTION Elec㐞trical specification Curren Consumption Maximu allowe curren consumptio o circui boar fitte int a expansio slo is: 0.5A from the +5V rail. 50mA from the +12V and -12V rails. Signa Outputs Al signa output (dat, addres, contro an clocks hav th capabilit t driv maximum of 2 LS TTL loads,i.e. 㐞 Logic high state voltage (Voh); 2. < Vo < 5.2 wit maximu hig stat outpu sourc curren o 40uA. Logic low state voltage (Vol); -0. < Vo < 0.8 wit maximu lo stat堠 outpu sin curren o 0.8mA. Signa Inputs Th signa inpu㐞t t th dat bu requir tri-stat drive stag meeting th followinrequirements Logi hig stat voltag (Voh); 2. < Vo < 5.2V wit maximu hig stat堠 outpu sourc curren o 400uA. Logic lo㐞w state voltage (Vol); -0. < Vo < 0.5 wit maximu lo output state sink current of 8mA. All th remainin input ar堠 contro input an requir t b drive b a open collecto drive stage Th inpu contro line o th Syste Boar ar fitte wit pull-u resistor (3.3k) 㐞 Pin Detail Bot Expansio Slot ar 64-wa connector (DI 41612 b 3 female wit typ housing an ar identica wit regar t th connection t th syste buses a illustrate o th diagra o th Expansio Connector descriptio o eac connectio t th Syste Boar i detaile below. DBt DB1 16-bi syste dat bus Connecte t th pai o栠 transceiver whic蠠 for㐞 th interfac betwee th multiprocessor an th syste dat bus DB i th LSB DB1 th MSB I effect th bu i divide int tw part (th lo orde sectio DB t DB7 an th hig orde sectio DB t DB15) t suppor bot 8-bi (byte an 16-bi (word dat transfers Byt transfer from/t eve addres location ar transferre o th㐞 bu line DB t DB an byt transfer from/t od addres location ar transferre o bu line DB t DB15 Wor transfer from/t eve addresse ar transferre o bu line DB t DB1 i singl operation Wor transfer from/t od addres location ar automaticall transferre i tw consecutiv 㐞  dat byt transfe operations th firs operatio use bu line DB t DB1 (od addres transfer) an th secon operatio use bu line DB t DB (eve addres transfer). AB0 to AB19 20-bi syste addres bus Connecte t th octa D-typ latche whic 㐞demultiple th 2 addres bit fro th loca bu o th堠 multiprocessor (tim堠 multiplexe address/dat bu fo th 1 LS an th tim multiplexe䠠 address/statu bu fo th 4MSB) AB i th LSB AB1 th MSB AB ha specia functio an i normall use i conjunc㐞tio wit蠠 th堠 BHŠ signa젠 t conditio circuitr fo byt o wor dat transfers BHE Bu Hig EnableConnecte t D-typ latc whic demultiplexe th BHŠ signa fro th堠 loca bu o th堠 multiprocessors Normall use i conjunctio wit AB t enabl circuitr fo byt o wor dat 㐞transfer o th lo o hig orde section o th16-bi dat bua follows; BHE AB0 Transfer operation 0 0 Whole Word 0 1 High order byte 1 0 Low order byte 1 1 None ALŠ Addres Latc Enable Connecte t th 828 㐞 Bu Controller Negativ edg o th activ hig puls provide a indicatio o whe th addres i valid DEΠ Dat Enable Output from th 828 Bu Controller Activ high durin memor an input/output data transfers. DT/ Dat Transmit/Receive Output from te 828 Bu Controller Signifie directio o dat flo㐞w.Logi hig indicate data transmissio fro th processin system; logi lo, dat reception. AMW Advance Memor Writ Command Output from th 828 Bu Controller Activ lo contro signa whic i set activ befor thMemor Writ堠 Comman t provid堠 memory-mappe device a earlie indicatio o writ cycl. MWT Memor Wr㐞it Command Output from the 8288 Bu ControllerActiv lo writ comman fr memory-mapped devices. AIOWà Advance Inpu/Outpu Writ Command Outpu fro th 828 Bu Controller Activ lo contro signa whic i se activ befor th Inpu/Outpu Writ Comman t provid input/outpu device a earlie indicatio o writ cycle 㐞 IOW Inpu/Outpu Writ Command Outpu fro th 828 Bu Controller Activ lo writ command for input/output devices. MRDà Memor Rea Command Outpu fro th 828 Bu Controller Activ lo rea comman fo memory-mapped devices. IOR Inpu/Outpu Rea Command Outpu fro th 828 Bu Controller Activ lo rea comman for input/output de㐞vices. MRD٠ Memor Ready Inpu connecte t th 8284 Cloc Generato (RDY2 vi a ANĠ gate Normall a logi high bu i se lo t comman th processin element t exten th contro transfe commands b insertin wai states unti th selecte memory- 㐞  mappe䠠 devic i read fo th堠 dat transfe operation MRD returnin t logi hig indicate tha th selecte memory- mappe䠠 devic i read fo th堠 dat transfe operatio (rea o write). IORD٠ Input/Outpu Ready Inpu connecte t th 8284 Cloc㐞 Generato (RDY1 vi a AN gate Normall a logi high bu i se lo t comman th processin element t exten th contro transfe commands b insertin wai states unti th selecte input/outpu devic i read fo 㐞th dat transfe operation IORD٠ returnin t logi hig indicate tha th堠 selecte input/outpu devic i read fo th dat transfe operatio (rea o write) REӠ Syste Reset Outpu fro th 8284 Cloc Generato vi㐞 a inverter Activ堠 lo stat generate b th Cloc Generato o receivin hardwar rese (powe o rese o vi th Hardwar Rese butto o th Keyboar Unit). CLK1 1 MH Cloc signal Buffere outpu fro th 8284 Cloc Generato wit 50 dut 㐞 cycle CLK MH Cloc signal Outpu fro th 8284 Cloc Generato vi a inverter Inverte for o th cloc signa supplie t th processin elements 66 dut cycle. DMA DM Reques fo DM Channe젠 1 Inpu 㐞 connecte t th DM reques lin (DRQ1 o th 808 Inpu Outpu Processo (IOP vi a inverte an O gate logi lo o DMA signifie t th IOР tha th selecte䠠 devic堠 i read fo ᠠ DMA transfe operatio (rea o write) usin㐞 DM Channe o th IOP. EXT Externa Terminat fo DM Channe 1 Inpu connecte t th Externa Terminat lin (EXT1 oth 8089 IO vi a inverte an OR gate logi lo o EXT request th IOP tterminat th curren DMtransfe operatio on DM Channe . DMA DM Reques fo DM Channe젠 2 Inpu 㐞 connecte t th DM Reques lin (DRQ2 o th 808 IO vi a AN gat an inverter logi lo o DMA signifie t th IO tha th selecte devic i read fo DM transfe operatio (rea o write) usin DMA Channel 2. EXT Externa Terminat fo DM Channe 2 Inpu connecte t 㐞th Externa Terminat lin (EXT2 o th 808 IO vi a inverter logi lo o EXT request th IOР t terminat th curren DM transfe operatio on DMA Channel 2. INT InterrupReques (Priorit 2)Inpu line connecte t th Interrup Reques input o th Programmabl Interrup Controlle 㐞  (PIC vi a inverter Th interrup typ numbe supplie t th 808 processo o acknowledgemen o th interrup reques i 52H (Th interrup typ numbe act a pointer to the interrupt service routine.) INT Interrup Reques (Priorit 3) Inpu lin connecte t th Interrup Reques inpu o th PI vi a inverter Th interrup 㐞 typ numbe supplie t th 808 processo o acknowledgemen o th interrup reques i 54H (Th interrup typ numbe ac a pointer to the interrupt service routine.) NM Non-Maskabl Interrupt Inpu connecte t th NM inpu o th 808 processo vi a inverter logi hig t lo transitio o NMɠgenerates the predefined interrup㐞t type number 2 internally within the 8086, which act a pointe t an interrup servic routine. Address Allocation Th availabl addres location i th syste memor spac an input/outpu spac allocate t th Expansio Slot ar detaile below 8-bi device connecte t th lowe hal o th dat bu mus b locate o eve addres boundarie an 8-bi device㐞 connecte t th uppe half o od addres boundaries System memory: 40000H to EFFFFH. System input/output: 80H to 1FFH excluding F8H to FFH. Expansion Board Layout Detail Th dimension an layou detail fo th Expansio Board ar detaile o th diagra o th nex page Th uppermos vie illustrate th overal boar dimension an th locatio o th connector Th middl projectio provide differen vie o th connecto an detail th㐞 maximu heigh availabl fo component mounte o th board Th lowe illustratio detail al th drillin requirement fo th printe circui boar an th boar area available. .pa Figure 2. Expansion board detail imension an th locatio o th connector Th middl projectio provide differen vie o th connecto an detail th㐞.fo # .HE DISKS DISK INPUT/OUTPUT SYSTEM AND DISK FORMATS INTRODUCTION Th BIO act i conjunctio wit MS-DO 2. wher dis I/ i concerned MS-DO wil cal routin withi th BIOS passin parameter suc a wher o th dis t writ th data ho muc dat t writ an wher th dat i hel i memory Th BIO wil the infor th㐞 flopp dis controlle o wha ha t b done whic wil the perfor th actua write b movin th hea t th correc plac o th dis an the sendin th actua dat t th dis controlle whic wil writ i t th disk. APPLICATIONS INTEREST Al application leve programmin shoul onl us th dis handlin instruction provide b th languag tha i bein use or i exceptiona circumstances th MS-DO interrupt ca b use t rea an writ files Som e㐞xterna utilitie suc a DEBUǠ wil allo th use t writ absolut dis sectors I shoul b stresse tha unde n circumstance mus an sector b change unles ther i ful knowledg o wha i bein done Th actua wa tha th Aprico use th dis controller i sufficien fo mos software. SYSTEMS INTEREST Mos input/outpu t th dis controlle i performe b th 8089 Th 808 use paramete bloc (locate i memory whic i se u b t㐞h BIO t contai variou piece o informatio relatin t th relevan dis operations The signa i sen t th 808 whic read th paramete bloc an take actio o it contents I wil becom apparen i an experimentatio i carrie ou tha al th physica detail o ho th dis i writte o rea ar handle b th flopp dis controller Th BIOӠ passe command an parameter t th Flopp dis controlle an the envoke th 808 (a describe㐞  above) Th 808 i use i onl two o it operatio modes an tha i transferrin dat fro port to memory (on READ) and memory to port (on WRITE). backgroun "demon i used whic make regula check i conjunctio wit th cloc interrup o th flopp dis drive t ensur tha th use ha no swappe disks Th demo wil b activate wheneve dis ha no bee accesse o checke fo mor tha 1. second - theor ha i tha i take a leas second㐞 t chang disk I dis ha bee removed th cach i flushe o al sectors block referrin t tha disk. .PA Disk Formats Th firs 15 sector (8089 bytes o eac Aprico Syste dis ar reserve fo th operatin system. Apricot Disk Sector map of the First 158 Sectors. Sector Contents 0 Label (1 Sector) 1 㐞 FAT 1 (2 Sectors) 3 FAT 2 (2 Sectors) 5 Directory (8 Sectors) 13 Character Font (20 Sectors) 33 㐞 Keyboard Table (2 Sectors) 35 MS -DOS's SYSINIT (4 Sectors) 39 BIOS Code and Constants (86 Sectors) 125 MS-DOS 2.0 㐞 (34 sectors) .pa The Label Sector Th Aprico dis Labe secto i th firs 51 byte o th dis ( sector) Onl th firs 12 byte ar relevan fo th boo RO͠ locatin wher th operatin syste i o th disk wher t loa i i RAM an wher t execut i fro whe loaded Thes 12 byte ar divide a follows: 㐞 Mnemonic Type Specimen value Description LBLform_vers WORD 0,0,0,0 | Versio o FORMA tha create disk LBLop_sys BYTE 1 | 0=invali 1=MSDO 2. 2=p-syste 3=CP/M-8 4=Concurren CP/M 5=BOS, 6=UNIX LBLsw_prot 㐞 BYTE 0 | Softwar Writ Protect 1=dis i write-protected 0=dis ca b written to LBLcopy_prot BYTE 0 | Not used LBLboot_disk BYTE * 1 | Mus b i vali boo dis㐞 ( o dat onl disks) LBLmulti_region BYTE 0 | No Multi-regioned LBLwinchester BYTE 0 | No Wincheste Disk LBLSec_size WORD 512 | Sector Size LBLSec_track WORD 9 | Sector pe track LBLtracks_side WORD 70,0 | Tracks per side LBLsides BYTE 1 | Number of sides LBL㐞 interleave BYTE 1 | Interleave factor LBLskew WORD 5 | Skew factor LBLboot_locn WORD * 29,0 | Secto o boo image LBLboot_size WORD * 112 | Numbe o bootstra sectors LBLboot_addr WORD * 00H,0D80H | boo loa addres (0D80:0000H) LBLboot_start WORD 㐞 * 29H,0E00H | boo star addres (0E00:0029H) LBLdata_locn WORD 13,0 | Secto o firs dat block LBLgeneration WORD 0 | Generation number LBLcopy_count WORD 0 | Copy count LBLcopy_max WORD FFFFH | Maximu numbe o copies LBLserial_id WORD 0,0,0,0 | Seria㐞!l Number LBLpart_id WORD 0,0,0,0 | Part Number LBLcopyrite ASCII (c) ACT | Copyrigh o Informatio data Thos dat item marke ar vita t th operatio o th curren Boo ROM th res may be used by future BIOS releases. .pa MS-DOS AND BIOS UTILISATION OF THE DISKS FAT's 1 and 2 Th FA (Fil Allocatio Table i wha MS-DO use t remembe wher o th dis eac fil wi㐞!l go Directory Th director i MS-DOS' lis o content o disk Pointin t th firs FA entr fo file Othe informatio suc a fil size and creation date is kept in the directory. Character Font memor imag o th characte fon whic wil b directl loade int memory Th las 2kbyte o th characte fon i th Aprico Log whic i loade int it respectiv plac i memory. Keyboard Table This is the keyboard table image. 㐞!SYSINIT Th SYSINI cod use t initializ MS-DO 2.0 BIOS code  Anothe direc memor imag containin th BIO progra. MS-DOS 2.0 MS-DO 2. itself totall self-containe module. .PA The Configuration data: For The BIOS, the next data is used at initialisation time: LBLBPBsctr_sz WORD 512 - Sector size in bytes LBLBPBclu_sz BYTE 1 - Cluster size in sectors LBLBPBrsvd_sct BYTE 1 - Number of reserved sectors LBLBPBn_fats 㐞!BYTE 2 - Number of FATs LBLBPB_dir_ent WORD 128 - Number of dir entry(s) LBLBPBn_sec WORD 630 - Number of sectors on disk LBLBPBmedia_id BYTE 0FCH - Media number/identification LBLBPBn_fat_s WORD 2 - Second Number of FATs  BYTE ?  WORD ? LBL_font_name ASCII 'FONT=BRIT02 ' - Font Name LBL_keys_name ASCII 'KEYS=ACT001 ' - Keyboard name Nex i th labe secto i th configuratio d㐞!ata whic i change b th syste configuratio package Th sampl dat give belo i fo typica Syste Disk: Configuration data: System Unit: CNF_drive0 BYTE 1 - 70 track drive CNF_drive1 BYTE 1 - 70 track drive CNF_diagflg BYTE 0 - Diagnostics on or off? CNF_lst_dev BYTE 0 - Parallel LST: device CNF_bell_vol BYTE 4 - Default Bell volume CNF_cache_on BYTE 1 - Primary of se㐞!condary Cache? CNF_graph_on BYTE 0 - Graphics on or off?  BYTE 0  BYTE 0,0,0,0,0,0,0,0 - NOT USED Keyboard: CNF_Click_vol BYTE 8 - KB click volume CNF_rept_en BYTE 1 - Auto-repeat master enable CNF_rept_dly BYTE 25 - Lead-in delay - 25*20ms=500ms CNF_rept_int BYTE 5 - Repeat interval rate CNF_Mscrn_mode BYTE 0 - MScreen echo  BYTE㐞! 0,0,0  BYTE 0,0,0,0,0,0,0,0 Screen:  BYTE 0,0,0,0,0,0,0,0 - NOT USED  BYTE 0,0,0,0,0,0,0,0 - NOT USED Serial or AUX communications: CNF_Tx_brate BYTE 14 - Tx = 9600 baud CNF_Rx_brate BYTE 14 - Rx = 9600 baud CNF_Tx_bits BYTE 8 - 8 bits/char CNF_Rx_bits BYTE 8 - " CNF_STOP_bits BYTE 2 - 1.5 stop bits CNF_paritychk㐞! BYTE 0 - Parity check off CNF_paritytyp BYTE 0 - No Parity CNF_tx_xonof BYTE 0 - Tx XON protocol CNF_rx_xonof BYTE 0 - Rx XOFF protocol CNF_rx_x_limit WORD 30 - XON/XOFF Rx buffer limit CNF_dtr_dsr BYTE 0 - No DTR/DSR protocol CNF_cts_rts BYTE 0 - No CTS/RTS protocol CNF_CR_Null BYTE 0 - Number of Nulls after CR CNF_FF_Null BYTE 0 - nulls * 10 to send after FF  BYTE 0,0,0,0,㐞 !0,0,0 - NOT USED  BYTE 0,0,0,0,0,0,0,0 - NOT USED Parallel Comms: CNF_p_CR_LF BYTE 0 - No CR after LF CNF_select BYTE 1 - Select Line supported CNF_pe BYTE 1 - Paper Empty supported CNF_Fault BYTE 1 - Fault Line supported  BYTE 0,0,0,0,0,0 - NOT USED  BYTE 0,0,0,0,0,0,0 - NOT USED Winchester Disk:  BY㐞"TE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA RAM Disk:  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA Spare:  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA 㐞"  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  Spare:  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA  BYTE 0,0,0,0,0,0,0,0,0,0 - NYA 㐞".HE TIMER PROGRAMMABL INTERVA TIMER List of Contents Page INTRODUCTION 2 DESCRIPTION 3 General 3 Counter 0 㐞" 5 Counter 1 and 2 6 Baud Rates List of Illustrations Figure Programmable Interval Timer block diagram 1 Mode 0 timing diagram 2 Mode 3 timing diagram 3 .FO 㐞" # .pa Figure 1.Programmable Interval Timer block diagram TMR Pin Definition CK0 Clock input for Counter 0 CK1 Clock input for Counter 1 CK2 Clock input for Counter 2 OUT 0 Output from Counter 0 OUT 1 Output from Counter 1 OUT 2 Output from Coun㐞"ter 2 D0 to D7 Data bus connection RD Read control line WR Write control line CS Chip select input A0,A1 System address bus inputs INTRODUCTION Th Inte 8253- Programmabl Interva Time (TMR i locate o th Syste Board Th time utilize tw cloc input fro divide circui t generate: (a cloc outpu (OUT0, whic i connecte t a 㐞" interrup reques lin (IR6 o栠 th堠 Interrup Controlle (PIC) Th outpu provide mean o generatin砠 accurat timin delay unde softwar control. (b Tw squarewav cloc output (OUT an OUT2 whic ca b use t se th bau rate fo th RS232 serial interface Th frequencie o th tw cloc output ar determine b software. DESCRIPTION General Th t㐞"ime i organize internall a thre independen 16-bi counters, eac wit a associate contro wor registe whic determine th operatin mod o th 16-bi counter Th counter coun dow o th negativ edg o th respectiv cloc puls input. Th syste softwar view th thre counter an th contro wor registe se a a arra o periphera젠 input/outpu ports Th por addres location define b th time selec an syste addres bu connection ar㐞 " detaile below: Port Address Data Counter 0 58H Count state 0 Counter 1 5AH Count state 1 Counter 2 5CH Count state 2 Control word register set 5EH Control word Dat ca b writte t al fou addres location bu ca b rea onl fro th thre counte locations Eac counte ha t b initialize wit th require mod o operation㐞# th coun stat format an th numbe o byte i th coun state usin th contro wor, prio t loadin th coun state Th counter begi countin downward o completio o th coun stat loa operation Th coun stat ca b on o tw bytes. Th forma o th contro wor i a follows: Control Word Format D7 D0 SC1 SC0 RL1 RL0 M2 M1 M0 BCD 㐞# Counter format Mode Count state byte operation Control word selection Control word selection SC1 SC2 0 0 Counter 0 0 1 Counter 1 1 0 Counter 2 㐞# 1 1 Invalid Count state byte operation RL1 RL2 Latc counstat int storage register 0 1 Read/load most significant byte only 1 0 Read/load least significant byte only 1 1 Read/load least significant byte followed by most significant byte. Mode M2 M1 M0 0 0 0 Mode 0 In㐞#terrupt on terminal count 0 0 1 Mode 1 Programmable one shot x 1 0 Mode 2 Rate generator x 1 1 Mode 3 Squarewave rate generator 1 0 0 Mode 4 Software triggered strobe 1 0 1 Mode 5 Hardware triggered strobe Counter format BCD 0 Binary Counter 1 BCD Counter Initializin selecte cou㐞#nte require th contro wor t b assemble a detaile belo an the writte t th contro wor registe se addres location. SC1 SC0 RL1 RL0 M2 M1 M0 BCD Selec Counte format Specify mode Specify number of bytes Select Counter 㐞# Onc initialized th counte ca b loade wit th coun stat a an tim followin initialization Th onl constrain i tha whe mor tha on byt i t b loaded th byte mus b loade int th counte addres locatio i th orde specifie b th contro word Selectin th conditio fo loadin on byt onl int th counter automaticall set th othe byt t zer coun state Th counte begin decrementin afte th ful coun value ha bee㐞# loaded. Tw method ar availabl t rea th coun value reache b th counters whils th counter ar countin down Bot method hav n affec o th operatio o th counters Th firs metho i achieve b readin th dat store a th selecte counte addres locatio usin tw consecutiv rea operations Th firs rea operatio return th leas significan byt o th coun stat an th second th mos significan byte. Th secon metho ensure tha stab㐞#l coun stat readin i obtaine b utilisin th contro wor t latc th coun stat int storag registe associate wit eac counter Th coun stat i the obtaine i th sam manne a th firs method (B performin tw consecutiv rea operation t acces th store coun value a th counte addres location) T latc th coun stat int th storag register th contro wor i writte int th addres locatio o th contro wor registe set, wi㐞 #t th forma a detaile below. D7 D0 SC1 SC0 0 0 x x x x Logic state immaterial Defines latch operation Selects counter Counter 0 Fo th outpu o Counte (OU 0 t b use a a interrup reques lin t th Interrup Controller th counte mus b se t operat i Mod 0 Whe th counte i㐞$ initialized outpu (OUԠ0 i se t logi low Afte th counte i loaded th counte begin t coun dow a illustrate i th timin diagram Figur below. Th coun stat i decremente o th negativ edg o eac 0.2 MH cloc pulse O reachin zer coun state th counte outpu i se t logi high Thi conditio remain stati unti reset, (eitheb re-initializin th counte o b loadin ne valu int th counter) Th counte continue t de㐞$cremen afte th zer coun stat i reached,startin fro th maximu coun stat o th counter unti reset 216 fo binar counter 104 fo BC counter) Thi featur allow th softwar t determin th exac tim o th interrup reques b readin th Counte򠰠coun stat an performin simpl calculation Figure 2.Mode 0 timing diagram. Counter 1 and 2 Counte an Counte㐞$ ar se t operat i Mod 3 t produc squarewav outpu fo us b th RS232à seria interface I Mod 3 tru squarewav i onl produce b programmin th counte wit a eve coun state Unde thi condition th counte remain a logi hig fo on hal o th coun state an a logi lo fo th secon half Th counte i decrease b tw o th negativ edg o eac 2MH cloc puls a illustrate i th timin diagram Figur 3. Whe th co㐞$unte reache zer coun state, thorigina coun valu i reloade int th counte an th proces repeated Thi produce squarewav outpu wit frequenc equivalen t th inpu cloc frequenc ( MHz divide b th coun state an 50 dut cycle. Whe th counte i programme t operat i Mod usin a od coun value th frequenc o th outpu i equivalen t MH divide b th coun valu a fo a eve coun value bu th outpu wavefor i asymme㐞$trical Th asymmetr bein mor pronounce fo lo coun value (hig outpu frequencies) I th valu i odd th counte outpu remain a logi hig fo (N+1)/ cloc pulse an remain a logi lo fo (N-1)/ cloc pulse a illustrate i th timin diagra Figur 3 wher represent th coun value. Figure 3.Mode 3 timing diagram Baud Rates Th coun value fo programmin Counte 1/Coun㐞$te t produc som o th commonl use bau rate ar detaile i tabula forma below Thes堠 value onl appl t asynchronou communications wher th output supplie fro th counter ar divide b 1 internall withi th SI prio t settin th bau rate. Equivalen Coun Value Baud Rate (Bauds) N (Hex.) 50 09C0 75 㐞$ 0683 110 046F 134.5 03A0 300 01A1 600 00D0 1200 0068 1800 0045 2400 0034 3600 0023 4800 001A 7200 0011 9600 000D 㐞$ 19200 0007  01A1 600 00D0 1200 0068 1800 0045 2400 0034 3600 0023 4800 001A 7200 0011 9600 000D 㐞 $.he APPENDIX C .fo # DEFAULT CHARACTER FONT Th defaul characte fon loade b th BIO int th Syste RA͠ (fo U use i illustrate o th followin page Thi i th ASCI characte set SINT 0 whic i allocate Kbyte o Syste memor fro addres locatio 0800Ƞ t 27FFH Eac o th 25 character i store i a are 㐞%o memor define a fon cell whic consist o 3 contiguou byte i memory organise a 1 consecutiv 16-bi words Fo furthe detail o th concep o th fon cel an detail o th metho o displayin character o th screen refe t th Scree Drive an CR Contro chapters. Note Th Scree Drive interpret th firs 3 ASCI code o th characte se (00 t 1FH) a contro codes unles th escap sequenc ES i sen t th driver. 㐞%.pa ASCII CHARACTER SETwords Fo furthe detail o th concep o th fon cel an detail o th metho o displayin character o th screen refe t th Scree Drive an CR Contro chapters. Note Th Scree Drive interpret th firs 3 ASCI code o th characte se (00 t 1FH) a contro codes unles th escap sequenc ES i sen t th driver. 㐞%.fo # .HE GUID T TH BIOS PROGRAMMERS GUIDE TO THE APRICOT BIOS INTRODUCTION Th Aprico BIO ha bee writte b AC t mak maximu us o th hardwar facilitie provide b th Apricot I incorporate numbe o uniqu facilitie whic ar no provide b othe microcomputers Th followin section describ ho variou aspect o th B㐞%IOӠ ca b change o accesse fro withi application software Wher necessar programmin example ar given Thes ar i MicroSof Basic whic i include wit al Apricots Fo othe languages th routine wil hav t b change accordingly. Bios Internal Structure -- Memory Map Al th BIOS dis operatin syste an allocatio o memor fo graphics dis cache characte font an keyboar table exis i th firs 128 byte o RAM Tabl i㐞% detaile Memor Ma showin location o th relevan part o th lowe 128k. .pa Table 1 -- Apricot Memory Map --E0000H USER RAM (Up to 896 kbytes) --20000H 㐞% MS-DOS 2.0 (17 kbytes) --1BC00H KEYBOAR TABLE (1 kbytes) --1B800H BIOS HEAP/STACK (4 kbytes) --1A800H GLOBAL VARIABLES 㐞% (10 kbytes) --17000H BIOS CONSTANTS (6 kbytes) --16800H BIOS CODE (34 kbytes) --0E000H 㐞% SYSINIT THROWAWAY (2 kbytes) 0D800H PRIMARY CACHE (6 kbytes) -- --0C800H SECONDARY CACHE (22 kbytes) --07000H R GRAPHICS LOG㐞 %O AREA (2 kbytes) (40 kbytes) --06800 CHARACTER FONT 3 (8 kbytes) --04800H CHARACTER FONT 2 (8 kbytes) -- --02800H 㐞& CHARACTER FONT 1 (8 kbytes) --00800H POINTERS (1 kbytes) --00400H VECTORS (1 kbytes) --00000H 㐞& Belo i descriptio o al th section illustrate i th memor map: VECTORS Mai hardwar an softwar Interrup an Jum vectors Use fo servic cal request fro bot hardwar an software. POINTERS 1 o doubl an singl wor pointers jum table an constants mos o whic ar use b th BIOS bu ca als b use o change b application software Tabl show al relevan addresses wit thei correspondin㐞& functions: Table 2 -- Pointer/constant area HEؠ AddresContents Type* 0400-04FF Bootstrap ROM working and communication area  0402-0403 Apricot memory size in paragraphs S  0408-0409 Drive number that the system was booted off S  040A-040D Pointer to configuration table in bootstrap D 040E-041 PointetBP imagibootstra D 0500-05FF IOP (8089) workin㐞&g and communication area  0500-0505 Channel control block (CCB), channel 1  0508-051D Channel control block (CCB), channel 2 0600-06FF Special Jump-Table  0600-0603 Long Control Device jump-table T  0610-067F Reserved 0700-07FF BIOS configuration and communication variables  0700-0703 Pointer to main configuration table D  0704-0705 Length of configuration block in bytes 㐞& C  0706-0709 Pointer to active character font D  070A-070B Length of font in bytes C  070C-070F Pointer to Apricot logo in the bootprom D  0710-0711 Length of logo in bytes C  0712-0715 Pointer to active keyboard tables D  0716-0717 Length of keyboard tables in bytes C  0718-071B Pointer to the default (boot) keyboard table D  071C-071D Length 㐞&of default table in bytes C S=singl word D=doubl word T=table C=constant Singl wor value ar tw byte long th lo byt containin th valu required. Doubl wor pointer ar fou byte long an confor t th standar Inte addressin foramts Th firs tw byte ar th offse fro th star o segmen tha th pointe i t reference an th secon tw byte ar th segmen address. .pa Table ar Jum tables use b th BIOӠ t㐞& quickl pas contro t variou part o itsel withou havin t mak multipl conparison whic woul us memor an slo dow operation considerably. constan i tw byte long th lo byt containin th relevan data. Car shoul b take whe alterin an o thes value a man o the ar use frequentl b th BIO (th keyboar pointer ar accesse numbe o time o eac ke depression) Her i a exampl metho o usin th pointe㐞&r fro Basic:  10 DEF SEG=0:CS=PEEK(&H0706)+256*PEEK(&H0707) 20 DEF SEG=PEEK(&H0708)+256*PEEK(&H0709)  I thi case lin 1 set th variabl C t poin t th beginnin o th characte se tabl i RAM an th curren activ segmen i se t th star o th segmen containin th characte set. CHARACTER FONTS 1, 2 and 3 Th BIOӠ use characte fon t defin th shape o th character a the appea o th screen I consist o 2㐞 &5 16- wor dat element - on fo eac character makin tota o 8 bytes Fo mor detail se th Characte Se section Ther i alway on defaul characte se i RAM whic start a 0800H Afte thi ther i 16 reserve fo anothe tw set i required Whe th cach o graphic i used however ther i onl roo fo th defaul characte set SECONDAR CACHE Th secondar dis cach i a extensio o th primar cache tha ca b use whe ther 㐞'i n graphic RA͠ required Th Boo RO͠ characte se i als place her a boot-up s character suc a th Aprico log ca b displaye o th screen. PRIMAR CACHE Thi i use a th mai dis cach memory Utilisin th now- vacan SYSINI space 6 o primar cach i available Se th sectio o Dis Cachin fo mor information. .pa SYSINIT Thi modul i provide b Microsof t initializ th MS-DO operatin system I i onl use 㐞'once eac tim th syste i boote up Residen i th BIOS i i "throw away whe i ha loade an initialize th operatin syste an th memor spac i occupie become vacan an i use fo variou syste purpose (se above). BIO CODE Th actua BIO program Thi sectio o memor contain al th BIO tha th Aprico MS-DO 2. implementaio uses Ther ar som interna table (suc a th keyboar table an jum tables) al o whic ar acce㐞'se b th pointers Fo assembl languag programmers thi cod i th primar BIO Cod Segment. BIO CONSTANTS A are o cod containin th constan numeri value whic ar establishe b th BIO a boot-u time an remai unchange unti th syste i re-booted Fo example on constan i th numbe o dis drive tha th particula Aprico configuratio has an i accsese b MS-DO an th BIOS. GLOBA DAT AREA Thi are store changin dat value tha㐞' ca b accesse an change b an par o th BIO o operatin system Initia defaul value ar place int thi are a boot-u time som o the remai unchange a pseudo-constants bu other ar constantl changin t dictat th curren stat o th machin softwar an hardware Fo example th defaul dis driv numbe i store her whic ha t b accesse b th BIO an MS-DOS bu ca b change a an time Thi i als th flag area containin 㐞'thing suc a th "I th calculato switche on? flag. BIO HEA AN STACK Thi are shoul neve b change b th user a i contain th wor spac tha th BIO use i ever operation Th mai progra stac i here alon wit th hea workspace I shoul b note tha th BIO Stac Segmen an Dat Segmen ar locate i thi area. MS-DO 2.0 Thi are o memor i reserve fo MS-DOS I contain th code stac an al th constan are tha MS-DO㐞' 2. uses Thi bloc o memor shoul unde n circumstance b change b th user N documentatio i (o wil be availabl a t it content o layout. .pa USE RAM Thi i wher al th use program ar loade an execute from Th memor i upwar vectored an u t th maximu Aprico addres spac o 896 ma b used Th progra are ca b divide b th use int self-containe Data Stac an Cod segments Essentially thi are ca b 㐞'use a th user' discretion an th BIO place n limit o (memor permitting ho muc cod and/o dat i store here. ute from Th memor i upwar vectored an u t th maximu Aprico addres spac o 896 ma b used Th progra are ca b divide b th use int self-containe Data Stac an Cod segments Essentially thi are ca b 㐞'.OP APRICOT TECHNICAL REFERENCE MANUAL .pa COPYRIGHT Portion o栠 thi manua contai materia reprinte䠠 b permissio of: SONY Corporation, Copyright 1982. TRADEMARKS MicroScreen is a registered trademark of ACT. MS is a registered trademark of the Microsoft Corporation. CP/M is a registered trademark of Digital Research. *******㐞 '************************************************** * * Informatiocontained i thi documen i subjec * * t chang without notic andoenorepresent * * commitment on the par o AC. * * * * Al right reserved n us o disclosur withou * * written consent. * * 㐞( * * Copyright (C) 1983 * * * * ACT (International) Limited * * ACT House * * 111 Hagley Road * * Birmingham B16 8LB * * * * 㐞( * ********************************************************* .pa ACKNOWLEDGEMENTS ACԠ (Advance Technology Lt expres thank t QEĠ Produc Desig Consultant o Newpor (Gwent Wales) wh produce th origina desig fo th Apricot an fo thei continuin involvemen wit th Project. .parmingham B16 8LB * * * * 㐞(.he SYSTEM BOARD .FO # SYSTEM BOARD List of Contents Page INTRODUCTION 2 DESCRIPTION 2 Processors 2 Communic㐞(ations Handling 3 Sound Generation 3 System Memory 3 CRT controller 4 Floppy Disk Controller 4 Expansion Slots 4 Interrupt Controller 4 Timer 㐞( 4 Input/Output Space 5 .pa INTRODUCTION Th architectur o th Aprico Syste Boar ca b spli int 9 mai sections a detaile below: 1. Processors 2. Communications 3. Sound Generation 4. System Memory 5. Expansion Slots 6. CRT control 7. Floppy Disk control 8. Interrupt Handling 9. Timer DESCRIPTION Processors Th Aprico has a stan㐞(dard tw 16-bi processors th Inte 808 microprocesso an th Inte 808 I/ processor Availabl a a optio i th 808 Mathematic co-processor. 8086. Th 808 processo i directl language-compatibl wit th 808 processo whic i use o man 3r Generatio machines I run a cloc spee o MHz typicall executin 1. millio instruction pe second an ha 16-bi data-bu whic enable i t rea an writ word int memor i on acces a oppose t tw 㐞(wit th 8088. 8089. Th 808 i a I/ processo an two-channe DM devic whic i use mainl fo dis read an writes I ha th capabilit t transfe dat fro memor t memory memor t port por t memor an por t port 808 (optional). Th 808 mathematic co-processo i use i paralle wit th 8086 Ful floating-poin an intrinsi arithmeti i supporte an th 808 ha it ow instructio se whic in effect extends the instruction s㐞(et of the 808. .pa Communications Handling Th Aprico ha tw periphera ports paralle printe por drive b th Inte 825 PIO an seria communication por drive b th Zilo Z8 SIO. Z8 SIO. Th Z8 Seria I/ Controlle ha tw independan full- duple channel wit separat contro an statu line fo modem o othe devices Dat rate fro t 500 bits/secon ca b accomplished Ful Synchronou an Asynchronou contro i provided bu th㐞 ( curren BIOӠ onl support Asynchronou protocols I th Asyn mode 5 6 o bits/characte an variabl stop-bi configuratio i available Als include i Brea Generatio an detection parity overru an framin erro detection Th controlle itsel als ha interfacin fo daisy- chai interrup vectorin withou externa logic. 8255A- PIO. Th 825 Paralle Input/Outpu interfac provide th communication interfac betwee th Aprico an a externa pr㐞)inter vi th Centronic connector I als produce serie o contro output t variou area o circuitr unde softwar control Thoug bi-directiona communicatio i supporte i hardware th curren BIOӠ onl use th standar for o communication. Sound Generation Th堠 Aprico use th Texa Instrument SΠ 7648 soun generator whic consist o th followin majo components: 1Thre programmabl ton generators eac wit 㐞) associate contro registers (Ton generator 1 an 3). 2 singl programmabl nois generato wit associate contro registers. 3 A 8-bi paralle interfac fo transferrin dat fro th dat bu t th contro registers. 4.An Audio output buffer stage. Withi th BIOS th soun generato i use fo keyclic (usin th nois generator o th "bell ton (usin on o th ton generato channels). System Memor㐞)y Address (hex) Address (K) Utilisation ============= =========== =========== 00000 - 3FFFF 0000 - 0256 Standard RAM 40000 - EFFFF 0256 - 0960 RAM expansion F0000 - F0FFF 0960 - 0964 Screen Buffer F1000 - F7FFF 0964 - 0992 Unused F8000 - FBFFF 0992 - 1008 Unused FC000 - FFFFF 1008 - 1024 Bootstrap ROM Th standar Syste RA cons㐞)ist o 3 64 bi DRAMs arrange i tw block o 128kbytes. The RAM expansion is by way of the Expansion Sockets. Th Scree Buffe RA i locate i tw separat Stati RA units. The boot PROMs are 2 2764 PROMs. CRT Controller Th CR contro circuitr is centre aroun th Motorol 684 CRԠ Controller Th hardwar ca b softwar configure fo eithe standar 8 2 tex mode o 80 40 pixe graphics. Floppy Disk Controller Th Flopp㐞) Dis Interfac i th Wester Digita WD2797-0 FDC serie o buffers decodin circui an th interfac connector Extensiv us i mad o th 808 I/ Processo whe readin an writin t disks. Expansion Slots Th Aprico ha tw expansio slot whic ar essentiall extension o th standar syste address dat an contro busses. Interrupt controller Th Inte 8259 Programmabl Interrup Controlle (PIC form th interfac betwee th㐞) device capabl o generatin interrup request an th interrup contro lin o th 808 processor. Timer Th Inte 8253- Programmabl Interva Time (TMR utilize tw cloc input fro divide circui t generat cloc output whic i connecte t a interrup reques lin o th PIC Thi provide th Cloc Interrup (se th Softwar sectio fo mor information) Also tw output ar use t se th bau rate fo th Z8 SIO. .pa Input/Output Space 㐞) Al th periphera component locate o th boar ar mappe int th Input/Outpu space wit addres location allocate a detaile below. DEVICE I/O ADDRESS LOCATION (Hexadecimal) PIC 0, 2 FDC 40, 42, 44, 46 PIO 48, 4A, 4C, 4E SOUND 50 GENERATOR 㐞) TIMER 58, 5A, 5C, 5E SIO 6O, 62, 64, 66 CRTC 68, 6A 8089 70, 72 EXPANSION 80 to 1FFF SLOTS  PIO 48, 4A, 4C, 4E SOUND 50 GENERATOR 㐞 ).HE DISPLAY UNIT .FO # .Op DISPLAY UNIT INTRODUCTION Th堠 standar Displa Uni i inc hig resolutio (40lines monochrom (gree o black displa monitor whic fit ont th shallo reces o th to o th Syste Unit Th uni tilt an swivels enablin th operato t positio th scree t obtai th optimu㐞* viewin angle. To minimise the possibility of operator eye fatigue: (aTh scree incorporate lon persistenc phospho (P39 to reduc displa flicker. (b A anti-reflectiv mes i fitte ove th scree t reduc glare. Displa brightnes i adjuste b manua contro locate nex to the recessed carrying handle on the rear of the unit. DESCRIPTION General Th displa i controlle b th CR circuitr o th Syste Boar㐞*d whic generate seria vide signa an tw syn signal (HSyn an VSyn t contro th movemen o th electro bea accros th screen) Th amplitud o th vide signa i approximatel 0. whe operatin i norma intensity 0. i hig intensity Th syn signal ar positiv TTL Th +12֠ suppl voltag fo powerin th monito i als supplie fro th Syste Unit 1. am fus i locate internally within the Display Unit. Th CR co㐞*ntro circui i programme t produc a interlace pictur o th scree operatin a fiel rat o approximatel 72 Hz and a line scan rate of 15.79 kHz. Th Displa Uni i connecte t th Syste Uni vi 6-wir cabl assembl terminatin i 9-pi femal D-typ connector. Physical Dimensions Max. height: 8.5 inches Max. width: 10.5 inches Max. depth: 10.0 inches Weight: 9.1 lbs 㐞*.op PREFACE Th Technica Referenc Manua fo th AC Compute Apricot i divide int thre section an numbe o appendices a detaile below Thi manua i intende fo programmer an engineer involve i hardwar an softwar desig fo Apricot. 1.SYSTEM OVERVIEW Thi sectio provide a overal descriptio o th Aprico compute an i divide int thre sub-sections. 1 HARDWARE describe th hardwar o Aprico i it 㐞* basi configuration an form th introductio t th thre element whic constitut th microcomputer;th Syste Unit,th Keyboar Uni an th Display Unit. 2 SYSTE͠ SOFTWARE provide brie descriptio o th堠 operatin砠 syste an it interfac堠 t th associate BIOS A introductio t th softwar module whic constitut th BIO i als provided. 3 OPTIONS, form th i㐞*ntroductio t th hardwar option availabl fo th microcomputer a th tim o printin th manual 2.HARDWARE DETAIL Thi sectio contain detaile description o al th hardwar aspect o th microcompute an i divide int numbe o sub- sections a detaile overleaf Eac o th thre element o Aprico ar discusse i detai wit majo circui element (e.g Processors Powe suppl etc. als havin separat descriptions. 3.SOFTW㐞*ARE DETAIL Thi sectio contain detaile descriptio o al softwar aspect o th BIO an i als divide int numbe o sub- sections Th firs provide detaile descriptio o th BIO a whol wit subsequen section detailin th individua hardwar drivers APPENDICES. numbe o appendice ar include i thi manua whic provid堠 genera젠 hardwar referenc informatio an䠠 als associate䠠 softwar堠 informatio o栠 㐞*specifi㠠 us堠 t systems/applicatio programmers. .PAt numbe o sub- sections Th firs provide detaile descriptio o th BIO a whol wit subsequen section detailin th individua hardwar drivers APPENDICES. numbe o appendice ar include i thi manua whic provid堠 genera젠 hardwar referenc informatio an䠠 als associate䠠 softwar堠 informatio o栠 㐞 *.fo # .he CONTROL DEVICE CONTROL DEVICE DRIVER INTRODUCTION Th Apricot' device ar containe i bot th BIO an MS-DO devic lists On exampl tha ha bee see alread i th MicroScreen tha i opene a norma fil fro withi Basi i MS-DOS Th Aprico ha man mor externa hardwar device tha mos othe machines an be㐞+caus o th wa the ar incorporate withi th BIOS extr hardwar system ca b accesse fa mor easil tha o othe systems I fact th sam routin ca b use fro withi progra t acces everythin fro th Scree Drive circuitr t th Mouse an dat ca b passe bot t an fro thes devices A present ther ar nin device catere fo withi th Devic I/ handling an mor hardwar an softwar device ar unde developmen a ACT APPLICAT㐞+IONS INTEREST I th BIO overvie th "BIO contro device wa mentioned Thi i routin whic start a 600 (withi th Pointe area an ca b calle fro a application program Parameter ar passe t eithe chang th wa tha th BIOӠ handle certai device (suc a th communication ports o acces thes device fo Input/Outpu operations. Callin Th Contro Device Th routin require (i all thre item o dat t b supplie t it㐞+ an i return one:  Parameters Supplied: 1. DEV - Device Number 2. COM - Command 3. DAT - Data to be sent Parameters Returned: 1. RET - Variable for Data/Status return  Whe th routin i calle a a absolut jum t th locatio 0000:0600H th firs thre item abov hav t b pushe (a words ont th stack Th routin ca als b accesse䠠 throug INTERRUPԠ 㐞+0FCH whic蠠 machin堠 languag programmer wil fin mor convienient I thi case th parameter ar passe i th register lik so:  BX - Device number (DEV) CX - Command (COM) DX - Data (DAT) .pa And the status is returned as:  AX - Status/Data (RET)  All the 8086 registers & the flags are saved Th thre item o dat ar al numeri values Th devic numbe i on o t㐞+h following:   ASCII HEX DEC DEVICE NAME 1 31H 49 - Screen driver 2 32H 50 - Keyboard driver 3 33H 51 - MicroScreen driver 4 34H 52 - Serial Input/Ouput driver 5 35H 53 - Parallel Input/Output driver 6 36H 54 - Mouse driver 7 37H 55 - Clock driver 3H 5 - Soun gener㐞+ator/driver 3H 5 - Floppy Disk Drivers B 42H 66 - Cache/Graphics/IBM config  Th command dat an retur statu al var dependin o whic devic i bein accessed. .pa Specifiation Of The Apricot Control Device a. Screen Driver Th Scree drive ca easil b accesse b usin thi configuration call:  DEV - 49 COM - 0 to 2 DAT - 0 or 1  COM = 0: Retur th curren 㐞+statu o th vide displa - RE return i n displa i connected o i i is. COM = 1: Ge o se tex an graphic mode I DA 0 the th Tex mod i selected o i DA 1 th graphic mod i selected. COM = 2: Switc th scree displa o or off I DA 1 th scree displa wil b switche off o i DA 0 th scree displa wil b switche on. b. The keyboard driver Thi optio allow th programme t se th Aut Repea Ke㐞+ status a define unde th Keyboar section.  DEV - 50 COM - 0 to 5 DAT - variable  COM = 0: Th keyboar statu wil b returne i RET mean tha th keyboar i connecte AN i vali ACԠ Aprico Keyboard mean tha ther i n keyboar connected. COM = 1: Th Aut Repea featur o som key ca b switche o o off Not tha Aut Repea i onl applicabl t thos key whic hav a aut repea attribute. .pa  Value In DAT 㐞 + Desired Auto Repeat Status 0 Disable 1 Enable  COM = 2: Th Aut Repea Lead-i dela ca b set thi i th ammoun o tim tha ke ha t b hel dow befor i wil auto- repeat DAԠ i fro t 255 eac valu add anothe 2 millisecond ont th repetitio rate. COM = 3: Th Auto-Repeat-Rat ca b set thi i th ammoun o tim i take i㐞, betwee repetition o th ke whe i i hel down ie th Repea Speed DA i fro t 255 eac valu add anothe 2 millisecond ont th Lead-i Time. COM = 4: Th ra downcode an upcode ar sen t MS-DO instea o th value o th keys Fo example UNDO whic i ke o th keyboar woul generat characte (CHR$(2) i th keyboar buffer an whe i i release i wil generat characte plu 80Ƞ (12 decimal thi ca b use t chec i 㐞, ke i bein hel down fo application suc a games T retur t normal eithe se DA t an re-cal o pres th HEL key. COM = 5: DA i ignore an th interna keyboar buffe i cleare an reset. c. MicroScreen Driver Thi optio allow th programme t bypas th norma metho o accessin th MicroScreen an sen character t th drive directly.  DEV - 51 COM - Either 0 or 1 DAT - From 0 to 255  COM = 0: DA i i㐞,gnore an RE wil eithe contai 0 whic mean tha th MicroScree i read t receiv characters (ie i onlin an working, o - whic mean tha th MicroScreen i i som wa ou o action. .pa COM = 1: Th characte hel i DA i printe t th MicroScreen A DA i tw byte long th characte t b printe i hel i th low-byte Al th MicroScreen-specifi escap sequence ca b use a normal. Programming Example: 10 REM -- Program to write A㐞,CT on the MicroScreen -- 20 DEF SEG=&H60 'Set default segment 3 IO= 'I indexe star of the Device I/0 routine in memory 40 DEV%=51 'Select the device number to be the MicroScreen 50 COM%=1 'Command is 1, so we want to OUTPUT 60 RET%=0 'Dummy variable to hold Returned status 70 ' Send an A 8 DAT%=ASC("A" 'Se u dat i DAT% 90 CALL IO(DEV%,COM%,DAT%,RET%) 'Call I/O routine to print character 100 ' Send a C 110 DAT%=ASC("C") 'Set up data in DAT% again 120㐞, CALL IO(DEV%,COM%,DAT%,RET%) 'Call to I/O 130 ' Send a T 140 DAT%=ASC("T") 'Set up a "T" in DAT% 150 CALL IO(DEV%,COM%,DAT%,RET%) 'Call to I/O 160 DEF SEG:END 'End program  d. Serial Port Driver Thi i th mos powerfu o al th Devic Modificatio routines thi optio allow th programme t sen an receive character an chang th SIϠ (Seria I/O setting (Bot Transmi AN Reciev BAU rates Sto Bits Parity Transmi Bits Reciev 㐞,Bits i additio t contro lin status)  DEV - 52 COM - From 1 to 16 DAT - 0 to 255 for character to send  COM = 0: Th SIϠ chi i polle t establis a t wethe th por i read t sen o receive an th resul i returne i REԠ - th por i ready - - No ready. COM = 1: Th lo byt o DA i transmitte. .pa COM = 2: DA i ignored an RE return th ASCI cod o th characte jus received If however RE return - (0FF㐞,FH) the ther i n characte t receive.  Programming Example 10 REM -- Program to emulate a teletype terminal. Half Duplex Mode 20 REM -- Any character received is printed on the screen, 30 REM -- Any key pressed is echoed on the screen AND sent. 40 ' Setup default variables: 50 DEF SEG=&H60 'Segment for IO Routine 60 IO=0 'IO now points to device I/O routine 70 DEV%=52 'Setup the device number 80 RET%=0 'Setup an empty return variable 90 ' Start 100 PRINT 㐞,CHR$(27) "z" CHR$(27) "2" 'Clear screen & flash cursor 110 GOSUB 800 'Get CHAR 120 IF CHAR<>-1 THEN PRINT CHR$(CHAR); 'Print it? 130 IN$=INKEY$: IF IN$="" THEN 120 'Is there a key ? 14CHAR=ASC(IN$):GOSU 900:PRIN IN$;:GOT 11 'Senan Print key 800 REM -- Routine to GET a character in CHAR 810 REM -- Returns CHAR=-1 if no character is available 820 COM%=2:DAT%=0:CALL IO(DEV%,COM%,DAT%,RET%) 'Get character 830 CHAR=RET%:RETURN 'Back to caller 900 REM -- Routine to SEND a character 㐞 ,in CHAR 910 COM%=1:DAT%=CHAR:CALL IO(DEV%,COM%,DAT%,RET%) 'Send character 920 CHAR=RET%:RETURN 'Back to caller COM = 3: Updat th SI wit th parameter tha ar se usin code t 14. COM = 4: Se th TRANSMI BAU RAT t th cod hel i DA ( t 15) COM = 5: Se th RECEIV BAU RAT t th cod hel i DA ( t 15) .pa  Table Of BAUD Rates  Value in DAT Desired BAUD rate 01 㐞- 50 BAUD 02 75 BAUD 03 110 BAUD 04 134.5 BAUD 05 150 BAUD 06 300 BAUD 07 600 BAUD 08 1200 BAUD 09 1800 BAUD 10 㐞- 2400 BAUD 11 3600 BAUD 12 4800 BAUD 13 7200 BAUD 14 9600 BAUD 15 19200 BAUD  COM = 6: Se th TRANSMI BIT PE CHARACTE t th cod hel i DA (DA i betwee an inclusive) COM = 7: Se th RECEIV BIT PE CHARACTE t th cod hel i DA (DA MUS㐞- b betwee an inclusive)  NOTE: The Number In DAT denotes the required Number of Bits  COM = 8: Se th numbe o STO BIT PE CHARACTE t th cod i DA ( t 3)  Value in DAT Desired Number of STOP BITS 1 ONE 2 ONE AND A HALF 3 TWO COM = 9: Se th PARIT TYP t th cod i DA ( t 2) .pa  VALUE IN DAT 㐞- Desired Parity Type 0 No parity 1 Odd Parity 2 Even Parity  COM = 10: Th curren XON/XOF TRANSMI protoco i se accordin t cod hel i DAT. COM = 11: Th curren XON/XOF RECEIV protoco i se accordin t cod hel i DAT.  VALUE IN DAT Desired Protocol Status 0 㐞- OFF 1 ON  COM = 12: Th RT lin ca b se o rese accordin t cod hel i DAT:  VALUE IN DAT Desired RTS line status 0 reset 1 set  COM = 13: Th DT lin ca b se o rese accordin t cod hel i DAT:  VALUE IN DAT 㐞- Desired DTR line status 0 reset 1 set  .pa COM = 14: Th Transmi Featur ca b enable o disabled:  VALUE IN DAT Desired Transmit Status 0 disable 1 enable COM = 15: Th Receiv Featur ca b enable o disabled: 㐞-  VALUE IN DAT Desired Receive Status 0 disable 1 enable  COM = 16: DA i ignore an RE give th curren CT lin status:  VALUE RETURNED IN RET CTS LINE STATUS 0 RESET 1 SET  COM = 17: DA i ignore an RE return th curren㐞- DC lin status:  VALUE RETURNED IN RET DCD STATUS 0 RESET 1 SET  .pa COM = 18: Th DS statu i returne i RET an DA i ignored:  VALUE RETURNED IN RET DSR STATUS 0 RESET 1 SET  IMPORTANT NOTE: Not tha an alterati㐞 -o mad b code t 1 wil no b invoke unti cod i used. Code t 1 wil retur th valu tha wa sen alon wit the t confir successfu alteration If however th dat i ou o rang (Ideall -1 the th current statu wil b returne i RE an n alteratio wil tak place. .pa Program Example  10 REM -- Program to re-configure the Apricot serial port 20 ' Set up numeric constants 30 DEF SEG=&H60 'Active segment to where control㐞. block is 40 DEV%=52 'Setup device number 50 RET%=0:DAT%=0 'Reset RET and DAT 60 IO=0 'IO is now where routine is in memory 70 ' Get current default status 80 DAT%=-1 'Rogue value to return status 90 COM%=4 'Get current Xmit BAUD Rate 100 CALL IO(DEV%,COM%,DAT%,RET%) 'Call IO 110 XBAUD=RET% 'Update Variable 120 COM%=5 'Get current Recv BAUD Rate 130 CALL IO(DEV%,COM%,DAT%,RET%) 'Call IO, remember DAT% 140 RBAUD=RET% 'Update Variable 150 COM%=6 'Get Xmit Bi㐞.ts/Char 160 CALL IO(DEV%,COM%,DAT%,RET%) 'Call IO 170 XBITS=RET% 180 COM%=7 'Get Recv Bits/Char 190 CALL IO(DEV%,COM%,DAT%,RET%) 'Call IO 200 RBITS=RET% 210 ' We won't bother with Stop bits or Parity 220 ' So now, XBAUD & RBAUD = Xmit and Recv BAUD RATES 230 ' XBITS & RBITS = Xmit and Recv BITS 240 PRINT"Current Values :" 250 PRINT"Transmit BAUD = " XBAUD " Receive BAUD = " RBAUD 260 PRINT"Transmit BITS = " XBITS " Recieve BITS = " RBITS 270 INPUT"Enter New Transmit BAUD :" ; XB㐞.AUD 280 INPUT"Enter New Recieve BAUD :" ; RBAUD 290 INPUT"Enter New Transmit BITS :" ; XBITS 300 INPUT"Enter New Recieve BITS :" ; RBITS 310 ' Update BAUD 320 COM%=4:DAT%=XBAUD 330 CALL IO(DEV%,COM%,DAT%,RET%) 'Update Transmit BAUD 340 COM%=5:DAT%=XBAUD 350 CALL IO(DEV%,COM%,DAT%,RET%) 'Update Recieve BAUD 360 ' Update BITS 370 COM%=6:DAT%=XBITS 380 CALL IO(DEV%,COM%,DAT%,RET%) 'Update Transmit BITS 390 COM%=7:DAT%=RBITS 400 CALL IO(DEV%,COM%,DAT%,RET%) 'Update Recieve BITS 4㐞.10 ' Intermediate values now set, so go and update the SIO 420 COM%=3 'Value for SIO update 430 CALL IO(DEV%,COM%,DAT%,RET%) 'Update the SIO 440 ' Everything done 450 PRINT "DONE":DEF SEG:END 'End .pa e. Parallel I/O Driver  DEV - 5 COM - 0 to 6 DAT - Not Used  COM = 0 Return the Parallel status. COM = 1 Thi optio wil retur th amoun o fre byte lef i th prin buffe i returne i RET. COM = 2 Set the F㐞.AULT line status:  DAT = 0 - Disable DAT = 1 - Enable  COM = 3 Set the SELECT line status detect:  DAT = 0 - Disable DAT = 1 - Enable  COM = 4 Set the PAPER ERROR line status detect:  DAT = 0 - Disable DAT = 1 - Enable  COM = 5 Set the Auto LF after CR enable:  DAT = 0 - Disable 㐞. DAT = 1 - Enable  COM = 6 Set the default printer type:  DAT = 0 - Parallel DAT = 1 - Serial  h. Sound Generator Thi optio allow th programme t var th volum o th sound generator  DEV - 56 COM - 0, 1 or 2 DAT - 0 to 15 COM = 0: REԠ give th statu (0=soun generato working),(-1=bsoun generato no working). COM =㐞. 1: DAԠ give th ne volum leve fo th ke click DA ca b fro (maximu volume t 1 (minimu volume) I DA i ou o rang (ideall -1 the th curren volum leve o th feedbac clic i returne i RET:  Program example 10 rem - program to increase the key click volume 20 def seg=&h60:io=0:ret%=0 30 dev%=56 'device number 40 com%=1 'command number 1 50 dat%=1 'highest level 㐞.60 call io(dev%,com%,dat%,ret%) 'do change  COM = 2: DA give th ne volum leve fo th bell DA ca b fro (maximu volume t 1 (minimu volume) I DA i ou o rang (ideall -1 the th curren volum leve o th bel i returne i RET. .pa i. Floppy Disk Drivers:  DEV - 39H DAT - 0-65535 COM - 0-4  COM = 0 Return the floppy disk status. COM = 1 Set the drive number for Format:  㐞 . DAT = 0 - Drive 0 DAT = 1 - Drive 1  COM = 2 DA contain th segmen o th trac imag t b place o th disk COM = 3 DAԠ contain th offse o th trac imag fro th segmen supplie usin cal 2. COM = 4 Format the disk using the parameters set up above. .pa k. Cache/Graphics/IBM configuration Thi choic select ho th memor are use fo Cache Graphics o IB P emulatio i t b㐞/ use b th BIOS.  DEV - 42H COM - 0 to 3 DAT - 0 to 2  COM = 0 Retur th statu i DAT I i returned the th use i fre t chang th usag facto o th memory IƠ 0FFFȠ i returne th use i stil fre t chang th usag factor however th BIO ma stil b usin th memory. COM = 1 Switch the Disk CACHE on or off:  DAT = 0 - On DAT = 1 - Off  COM = 2 Set the Graphi㐞/cs on/off flag in the parallel driver:  DAT = 0 - On DAT = 1 - Off  COM = 3 Set/Reset the IBM PC emulation flag:  DAT = 0 - On DAT = 1 - Off  SYSTEMS INTEREST Th Contro Devic i essentiall tree-structure se o jum tables Whe progra executio i fis passe t th contro devic entr point DE i checke fo legality an the Jumpe upo t th nex bra㐞/nc i th tree wher CO i checke an the jumpe upo t th appropriat configuratio procedure wher DA i the jumpe upo agai passin contro t th actua routin required whic coul b anythin fro settin fla t configurin th Z8 SIO. io i fis passe t th contro devic entr point DE i checke fo legality an the Jumpe upo t th nex bra㐞/.FO # .HE SERIAL PORT AUXILIARY DEVICE/SERIAL PORT INTRODUCTION Th Aprico has i additio t paralle port seria RS- 23 dat por whic ca b connecte t wid variet o externa hardwar add-ons Th hardwar tha control th por i th Z80 SI (Seria Input/Output chip Th Aprico i capabl o transmittin a 㐞/ rat o u t 1920 BAU (Bit pe second). APPLICATIONS INTEREST Mos communicatio wit th port an thu wit th outsid worl shoul tak plac throug th particula application languag bein used However th Aprico Contro Devic i a eas an powerfu wa o configurin an usin th port Fo mor informatio se th sectio concernin th contro device. SYSTEMS INTEREST Th seria communication drive manage RS-232 por o th Aprico 㐞/computer Th drive provide fo onl asynchronou dat transfe a speed fro 7 bau t 1920 baud A interrup drive interfac i provide a wel a tw dynami lengt queue t provid堠 characte bufferin whils th堠 interfac堠 or applicatio i otherwis occupied. Th seria por i locate i por o th Z80-SIϠ an utilise th followin control/statu signals  RTS - Request To Send (pin 4) CTS - Clear To Send (pin 5) DCD - Dat㐞/a Carrier Detect (pin 6) DTR - Data Terminal Ready (pin 20)  Th Cloc sourc fo th seria por i a follow (selectio i vi DT an RT bit o channe B):  DTR, RTS - Outpu cloc fro 825 t Rx outpu cloc렲 to TxC 1 - RxC and TxC driven from line clock - RxàanTx drive fro outpu cloco825 timer 3 - RxC and TxC at 0v  .PA Modem Control Through The AUX Device Whe Mode Contro i selected th use 㐞/ha contro ove th following:  RTS DTR Transmit Enable receive Enable  And can monitor the state of  RTS DTR Transmit Enable receive Enable DSR CTS DCD  cloc렲 to TxC 1 - RxC and TxC driven from line clock - RxàanTx drive fro outpu cloco825 timer 3 - RxC and TxC at 0v  .PA Modem Control Through The AUX Device Whe Mode Contro i selected th use 㐞 /.fo # .he SCREEN DRIVER SCREEN DRIVER INTRODUCTION Th Aprico Scree drive i a advance modul tha i designe t handl al communication betwee th CR scree an th MS-DO 2. Operatin system. Th softwar consist o numbe o modules an include th followin specifi areas:  1. Th CRTC interface whi㐞0c initialize th displa harware on power-up. Thi softwar i include i the Boot PROM as well a th BIOS. 2.Low-leve routine t displa characte i specified position o th screen. 3 Curso managemen routines t kee trac o th curso positio an curso mode. 4.Contro cod managemen functions t handl escap sequences and Control codes.  APPLICATIONS INTEREST Escape sequence 㐞0Management functions. Th Scree drive support 7 differen Escap sequences no includin th ANS codes Whe characte 2 decima o 1  he i receive b th Scree Driver contro i transfere (vi Jum Table whic branche t specifi piec o cod dependin o wha th nex characte t b displaye is Fo example t clea th VD scree th sequenc ESCAP ha t b sen t th scree driver O receivin th ESCAP code th BIO wil wai unti th㐞0 nex characte i sen t b displayed Whe i i receive (i thi cas a "E") contro wil b transferre t th sectio o cod whic deal wit clearin th screen Whe th scree i cleared contro i passe bac t th scree driver whic ca eithe displa th nex characte o retur t th DOӠ fo anothe functio t b executed Tabl i a annotate lis o al th Aprico Escap codes. .pa Table 1 -- List of all the Apricot Escape Codes.㐞0 * - Not Sirius compatible * 23 #- Transmi page Thi cod send eac characte o th scree t th MS-DO inpu buffe queue S afte printin ES # th keyboar buffe will contain the entire contents of the page  24 $ - Send th characte unde th curso int th keyboard buffer * 25 %- Transmit th lin tha th curso i o int the keyboard buffe㐞0r * 2 - Print th entir scree o connecte lin printer afte sendin For Fee character. * 27 ' - Print th lin tha th curso i o o th line printer - no Form Feed is sent first.  28 (- Se hig intensit mode Al character sen t th VDՠ fro no o wil b displaye brighter than the others.  29 ) - Cance젠 th hig intensit mode s al 㐞0 characternosen t th VD wil appea a equal brightness. * 2A *- Change to the second character font  2B +- Clea al th character tha ar displaye o the screen in High Intensity (see code 28) .pa * 2C , - Set the size of the video screen bounds: Four arguments are passed: 1-Top line 2-Bottom line 㐞0 3-Left column 4-Right column Not tha 31 mus b adde t thes values Fo example suppos yo wante t mak th scree 2 characte squar i th to left- hancornerYowouldthis PRIN CHR$(27)+","+CHR$(1+31)+CHR$(20+31) +CHR$(1+31)+CHR$(20+31) * 2D - - Clea al th character displaye i no㐞0rmal low intensity (see code 29) * 2E . - Rese th siz o th vide screen revoke th parameters passed using code 2C * 2F / - Se th membran LED' - se th sectio o th MicroScreen for more information.  30 0 -Se th underlin attribut o al character printe fro no on s no everythin printe will be underlined.  31 1 -Rese th underlin stat㐞 0u s tha character will not be underlined when printed.  32 2 -Se th blin attribut fo th bloc o underlin cursor s i wil flas o an of approximately 3 times each second.  33 3 -Switches the cursor blink off .pa  34 4 - Change the value of a key on the keyboard. Three arguments are passed: 1. The mode. From 1 to 3 - 1 is normal, 㐞1 2 is shifted, 3 is control. 2Th ke number A ASCI valu i th rang 0 to 95 3 Th ne characte fo th ke - A ASCII character from 0 to 255. eg PRINԠ CHR$(27)+"43HC" wil disabl th Contro ke ( i th ASCI fo 72 whic i the number of the C key)  38 8 - Se th LITERA TES MODE wher ch㐞1aracter wit a ACSI valu o les tha 2 he wil b displayed instead of obeyed. * 39 9 - Se th strikeou mod o: al character printe fro no o wil hav horizonta lin throug th middle. * 3A : -Set strikeout off - see code 39 * 3B ; - Move cursor to the bottom line (line 25) * 3C < - Display Time And Date On Mscreen  3F ? - Switches on the Internal cal㐞1culator  40 @ - Ente th INSER mod - no wheneve character ar printed al tex t th right-han o th sam lin i shifte on plac t th right.  41 A - Cursor UP, moves the cursor up one line  42 B - Cursor DOWN, moves the cursor down one line  43 C - Moves the cursor RIGHT one position  44 D - Moves the cursor back one position .pa  45 E - Clea th VD scree㐞1 an hom th cursor Lin 25 is left intact.  46 F - Ente graphi mode wher bloc렠 graphic character appea instea o lowe cas letters  47 G - Exit graphic mode (see code 46)  48 H - Home the cursor to the top left-hand corner  49 I - Mov th curso u on line an i i i a th to of the screen, scroll the page down  4A J - Eras al character o th scree f㐞1ro th curso position to the end of the page.  4B K - Delet t en o lin function al th character t th righ o th cursor an o the same line are deleted  4C L - Inser lin a th curso position al th line belo th curso ar scrolle dow on line.  4D M - Delet th lin tha th curso i on movin al th line unde t㐞1h curso u on t fil the gap.  4E N - Delete the character at the cursor  4F O - Exit insert character mode (see code 40)  50 P - Insert a single character at the cursor position * 51 Q - Scroll left n characters, eg PRINT CHR$(27)+" Q"+CHR$(31+5)move th entir scree content lef characters. * 52 R - Scroll right n characters .pa * 53 S - Scroll up n characters 㐞1* 54 T - Scroll down n characters * 55 U - Enable dual ouput to the MicroScreen * 56 V - Disable dual MicroScreen ouput *57 W - Outpu al tex t th MicroScreen bu disabl th screen. Code 56 re-enables the screen. not tha thi sequenc wil onl wor afte ESC U has been envoked 58 X - Exchang th lin tha th curso i o wit th last line that the 㐞1cursor visited.  59 Y - Mai curso addressin lead-i function Tw additiona byte hav t b supplied th lin an th column Th to left-han corne o th scree i positio 31,31 T mov th curso to Lin 7 column 41, it would be necessary to do this: PRINT CHR$(27)+"Y"+CHR$(31+7)+CHR$(31+41) I eithe valu i ou o range n movemen wil take place. 㐞 1  5A Z - Afte thi cod i sent th keyboar buffe i fille wit characters ESCAP K Thi ca b use a tes t se i softwar i runnin o The Apricot. * 5B [ - ANSI lead-in character (see section on ANSI)  62 b - Eras al character fro th curso position to the beginning of the screen  63 c - Disables MicroScreen scrolling  64 d - Enables MicroScr㐞2een scrolling (see code 63)  65 e - Whe th MicroScreen i ON thi wil switc th underline cursor on the MicroScreen on.  66 f - Whe th MicroScreen i ON thi cod wil switc th underline cursor on the MicroScreen off.  67 g - Disable time & date display on MicroScreen.  68 - Revers Tab, move th curso bac i modul o 8 positions jusaTa move th curso forward. 㐞2 69 i - Return th Bio numbe a thre characters e "2.3"  6A j - Save the current cursor position 6  -Return th curso t previousl save position (see code 6A)  6C l - Erase the entire line that the cursor is on  6E n - Retur th curren curso positio i th keyboar buffer as ESCAPE Y line, column.  6F o - Eras堠 fro th curso positio㐞2 t th beginning of the current line.  70 p - Ente th revers vide mode al tex printe fro no o wil appea a blac character o a green background.  71 q - Exit the reverse video mode described above.  72 r - MicroScree ech enable clear th MicroScreen switche th curso O an th DAT display OFF  73 s - MicroScree ech disable cl㐞2ear th MicroScreen switche th curso OF an th DAT display ON  74 t - Engage Shift Lock  75 u - Dis-engage Shift Lock .pa  76 v - Wra character aroun a th en o th lin (that is move on to the next line)  77 w - Remai a th en o lin whe tex i printed there.  78 x - Set environment flags: see below  79 y - Reset environment fla㐞2gs: see below  7A z - Rese al modes An command se wit an o th abov escap sequence wil b revoked se below Environment Flags: Fo escap code 7 an 79 singl byt argumen i required Thi byt i a ASCI numbe fro t 9 Eac numbe perform specifi function:  1 - Line 25 : enable or disable * 2 - Key click : on or off 3 - Hold㐞2 Mode : on or off 4 - Cursor type : block or underscore 5 - Cursor status : on or off * 6 - Mouse port : on or off * 7 - Margin bell : on or off 8 - Auto LF : yes or no 9 - Auto CR : yes or no  S t switc th curso OFF thi woul nee t b done: PRINT CHR$(27)+"x5" Or to switch it on: 㐞2PRINT CHR$(27)+"y5" .pa When ESCPAE z is used, the following action is taken:  1. Th scree i cleare (includin th 25t line an the cursor is homed 2. An mode (i reverse underline intensity ar switced OFF 3.Th curso i switche ON an se t BLOCK non- flashing. 4.Th Mous Port Margi Bell 25t Line Hol Mode Aut C an Aut L ar al disabled.  ANSI Escape Sequences㐞2 Man third-generatio machine suppor th ANSɠ (America Nationa Standard Institute se o escap sequences S a t retai compatibility man o th ANS code ar incorporate o th Apricot: MNEMONIC PARAMETER CODE FUNCTION CU : Cursor Movement Functions  CUU n A Moves the Cursor UP n lines  CUD n B Moves the Cursor DOWN n lines  CUF n C Moves the Cursor FORWARD n columns  㐞 2 CUB n D Moves the Cursor BACK n columns  CUP Y;X H Positions the Cursor at Y,X  HVP X;Y f Same as CUP, except parameters are reversed ER : Text Erase Functions * ED 0 J Erase from cursor to end of screen * ED 1 J Erase from start of screen to cursor  E Clea screen bu don' hom th cursor  EL 0 K Erase from cursor to 㐞3end of line * EL 1 K Erase from cursor to start of line * EL 2 K Erase the entire line that cursor is on CP : Report Functions  CPR l;c R Put cursor position into keyboard buffer SM : Set Mode Functions  LNM 20 h Auto CR (on reciept of LF)  DECOM 6 h Origin Mode ON (see note below) * DECAWM 7 h Auto-wrap at end of line 㐞3 RM : Reset Modes  LNM 20 l No Auto CR (on reciept of LF)  DECOM 6 l Origin Mode OFF (see note below) * DECAWM 7 l No Auto-wrap at end of line TAC : Text Attribute Change * SGR 0 m All attributes off * SGR 1 m Bold ON * SGR 4 m Underline ON * SGR 7 m Reverse video ON SCR : Screen size/mode modification 㐞3  DS Devic Statu Repor - Generate CPR * DECSTBM T;B r Set T (top) and B (bottom) lines  SCP s Save cursor position  RCP u Restore cursor position * = Code is not supported on the IBM PC Programmin Example Th followin progra produce som tex o th Aprico Screen usin th ANS escap codes:  10 an$=chr$(27)+"[" ' an$ is now the ANSI lead-in string 20 print an$ "2J" 㐞3' clear the screen 3 prin an "10;15 No a lin 10 colum 1 !! writ message 40 print an$ "5A Now at line 5, column 1 !!" ' another 50 print an$ "10;14r Screen is now 5 lines high !!"; 'set screen size 60 end  .pa Note On the ORIGIN MODE: Whe set lin i th to lin o th curren scrollin region th curso canno b move (b th ANSɠ sequences outsid o thi area Whe reset lin i th to lin an th curso ca the mov freel aroun th whol㐞3 screen Th curso i home wheneve th origi mod i reset o th scrollin margin ar set. Th scree drive als handle numbe o th standar ASCI contro codes whic hav value les tha 3 (2 hex). Th follwin code ar no acte upon an n character ar output:  0 - NUL, 1 - SOH, 2 - STX, 3 - ETX, 4 - EOT, 5 - ENQ, 6 - ACK, 16 - DLE, 17 - DC1, 18 - DC2, 19 - DC3, 20 - DC4, 21 - NAK, 22 - SYN, 23 - ETB, 25 - EMM, 26 - SUB, 28 - FS, 㐞329 - GS, 30 - RS, 31 - US, 32 - DEL.  These codes, however, perform specific functions: 07 - BEL - Sounds the internal bleeper 08 - BS - Moves the cursor back one space 09 - TAB - Moves the cursor RIGHT in modulos of eight 10 - LF - Move the cursor down one line 11 - VT - As above (LF) 12 - FF - As above (LF) 1- CҠ - Move th curso t th beginnin o th curren line 14 - SO - Switches in the second character set 15 - SI -㐞3 Selects the default character set 24 - CAN - Cancels any escape sequence currently in operation 27 - ESC - Herald the start of an escape sequence. .pa Physical Screen Layout Th Aprico scree ha 4 byt bloc o memor whic act a scree buffer Thi memor i locate a F000 he an i utilise a follows: Fo ever characte o th screen ther i on word Th firs wor i th scree buffe i fo th firs to left-han characte o th scr㐞3een th las wor i fo th botto right- han character. Word in The Apricot Screen Buffer:  second byte first byte    1 1 1 1 1 1 8 7 6 5 4 3 2 1 0 x x x x x x x x x x x x x x x x    ----- Font Cell Pointer -----    㐞 3 -- Software Reserved    -- Strikethrough    -- Intensity    -- Underline    -- Reverse Th diagra abov show graphica representatio o wor i th scree RAM I shoul b note tha th diagra i i high- lo order s th secon byt show actuall come befor firs on shown Th attribut bit hav th followin functions: 1. Reverse Field Vi㐞4deo. Whe thi bi i set th displa hardwar wil produc blac character o gree background. 2. High/Low intensity Whe thi bi i set it correspondin characte wil b displaye i hig intensit (o enhanced foreground mode. 3. Underline I thi bi i set horizonta lin on pixe hig wil b printe alon th botto o th character Th positio i th fon cel o th Underlin bi determine wher th lin i t go thus underl㐞4inin i programmable. 4. Strikethrough Thi bi determine whethe horizonta lin appear throug th middl o th characte displaye o not. 5. Software reserved Thi bi i currentl no use b th displa harwar o software howeve futur BIO release ma us it. Th 11-bi fon cel pointe ca poin t anywher withi th firs 32 (o WOR onl boundary i th botto segmen o memory (fo example i th valu containe her wer t b㐞4 0 th characte fon cel pointe t woul b a 0000:000 i memory fon cel consist o 1 word o 3 bytes wor fo eac lin o th character: A character font-cell:  0 1 2 3 4 5 6 7 8 9 A B C D E F - 0 . . . . . . . . . . . . . . . . 1 . . . . . . . . . . . . . . . . 2 . 1 1 1 1 1 1 1 . . . . . . . . 3 . . 1 1 . . . 1 1 . . . . . . . 1 4 . . 1 1 . .㐞4 . 1 1 . . . . . . . 6 5 . . 1 1 . . . 1 1 . . . . . . . 6 . . 1 1 . . . 1 1 . . . . . . . ..- strikethrough o 8 . . 1 1 . . . 1 1 . . . . . . . r 9 . . 1 1 . . . 1 1 . . . . . . . d A . . 1 1 . . . 1 1 . . . . . . . s B . . 1 1 . . . 1 1 . . . . . . . C . 1 1 1 1 1 1 1 . . . . . . . . D . . . . . . . . . . . . . . . . 㐞4 E . . . . . . . . . . . . . . . x - underline bit - F . . . . . . . . . . . . . . . . not used in the text mode Th defaul characte se tabl start a 800 i th lowe 64 memor segment Th firs word' Leas significan bi denote th statu o th pixe i㐞4 th to left-han corne o th fon cel o th screen i bi i set th pixe wil b on i bi i no set th pixe wil b off .pa Her i progra t demonstrat direc scree accessin fro Basic:  10 PRINT CHR$(27);"z";CHR$(27);"x5" 'Clear & cursor off 20 DEF SEG=&HF000:FOR P=50 TO 255 'Character loop 30 FOR M=1 TO 4000 STEP P 'Screen loop 40 POKE M*2,P 'Put character on screen 50 NEXT M,P:END 'Loop㐞4 till done  SYSTEMS INTEREST 1. CRTC initialization. Th Motorol MC684 CRT chi contain 1 interna register whic hav t b initialize befor an scree I/Ϡ ca tak place Informatio o th registe function an th actua dat whic ha t b place i the t perfor variou operation ca b foun i th CRT descriptio i th Hardwar section Onc thi informatio i established th por addresse use ar 68 fo th Addres register an 6A㐞4 fo th contro registers 2. Low level display routines. Thes routin run closel i conjunctio wit th curso managemen code Firs o all th curren curso positio i established th curso switche off an th characte t b printe o th scree i move int th positio i th scree memor tha th curso occupied The th attribut byt (se later i set Variou test ar the mad befor th curso i restored fo example doe 㐞 4th scree nee t b scrolled Whe an action hav bee taken shor dela (whic CAΠ b interrupted i executed Thi i calle th curso TIMEOU an i use t sto th curso appearin whe larg volume o tex (suc a directory ar bein output Whe th timeou ha expired th curso positio i updated an th curso i switche bac on 3. Cursor management routines. recor mus alway b kep o wher th curso i o th screen㐞5 i orde tha th characte displa routine kno wher t pu th nex character an certai consol function suc a repor curso positio ca work Th curso i manage b se o routine whic ca mov i aroun th screen Th initia curso mod i known s th actua positio o th scree ha t b calculated Onc thi i done th curso positio i sen t th堠 CRTà whic the move it interna curso referenc accordingly. .pa 4. How a character app㐞5ears on the screen Th CRT controlle chi wil generat wor addres i th scree buffe memory par o eac wor contain th attributes whic ar strippe of an passe t th vide contro logi t b use later Th whol wor a thi addres i the passe int th vide shif register whic passe th wor (a seria information t th vide outpu controller wher i i re-unite wit th (no processed attribut dat an the converte t㐞5 serie o ra on/of pulse read fo th CRԠ - after merging them with horizontal & vertical sync signals.  eac wor contain th attributes whic ar strippe of an passe t th vide contro logi t b use later Th whol wor a thi addres i the passe int th vide shif register whic passe th wor (a seria information t th vide outpu controller wher i i re-unite wit th (no processed attribut dat an the converte t㐞5.fo # .HE SOUND SOUND GENERATOR INTRODUCTION Th Aprico incorporate th S 7648 soun generato chip whic ha fou soun channels Tw o thes ar use b th bel an th keyboar click leavin tw fo th user Th BIO control th softwar aspec o th sound includin bot initializatio an execution㐞5 Th Keyboar clic i achieve throug th white-nois channe o th chip whil th bel use on o th squar wav channels. APPLICATIONS INTEREST Th Soun Generato i accesse fro Por 50H th progra below will play a short four-note tune:  10 DATA 9,128,15,149,168,7,182,192,5,215 'C 20 DATA 9,136,12,149,164,6,182,195,4,215 'D 30 DATA 9,128,10,149,160,5,182,197,3,215 'E 40 DATA 9,136,07,149,172,3,182,200,2,215 'F 50 DATA 4,159,㐞5191,223,255,255,255,255,255,255 'no note 60 FOR K=1 TO 5 70 FOR L=1 TO 10:READ A 80 OUT &H50,A:NEXT 90 FOR L=0 TO 200:NEXT 'Delay 100 NEXT  ort four-note tune:  10 DATA 9,128,15,149,168,7,182,192,5,215 'C 20 DATA 9,136,12,149,164,6,182,195,4,215 'D 30 DATA 9,128,10,149,160,5,182,197,3,215 'E 40 DATA 9,136,07,149,172,3,182,200,2,215 'F 50 DATA 4,159,㐞5.HE CONTENTS .FO # .OP CONTENTS SECTION 1.SYSTEM OVERVIEW HARDWARE INTRODUCTION SYSTEM UNIT KEYBOARD UNIT DISPLAY UNIT SO㐞5FTWARE INTRODUCTION BIOS FEATURES - OVERVIEW OF CAPABILITIES Foreground and Background Operations Multi-sector Reads and Writes Tri-buffer Apricot Control Device System Configuration Block MicroScreen Driver Time and Date Clock Calculator General Hardware Support OPTIONS INTRODUCTION FLOPPY DISK OPTIONS 128 KBYTE RA㐞 5M EXPANSION BOARD MODEM NUMERIC DATA PROCESSOR SECTION 2.HARWARE DETAIL SYSTEM UNIT INTRODUCTION SYSTEM BOARD DISK DRIVES POWER SUPPLY DETAILS General DC Supply Distribution Fuse Rating PHYSICAL DIMENSIONS .pa SYSTEM BOARD INTRODUCTION DESCRIPTION Processors 㐞6 Communications Handler Sound Generation System Memory CRT Controller Floppy Disk Controller Expansion Slots Interrupt Controller Timer INTERRUPT CONTROLLER INTRODUCTION DESCRIPTION General Interrupt Sequence Interrupt Masking PROGRAMMING CONSIDERATIONS General Initialization Command Words 㐞6 Operational Command Words TIMER INTRODUCTION DESCRIPTION General Counter 0 Counter 1 and 2 Baud Rates CRT CONTROL INTRODUCTION DESCRIPTION General Mode Selection CRTC DETAIL General Register Description Initialising the CRTC CRTC Connections SCREEN RAM 㐞6 General Text Mode Graphics Mode SYSTEM RAM UTILISATION General Text Mode Graphics Mode DISPLAY UNIT CONNECTOR DETAIL .pa FLOPPY DISK INTERFACE INTRODUCTION DESCRIPTION General Disk Write Disk Read Disk Formatting Read/write Head Positioning FDC DETAIL General Processo㐞6r Interface Disk Drive Control Command Register Status Register Track Register Sector Register Data Register PROGRAMMING CONSIDERATIONS Disk Drive Selection Head Loading Head Positioning Data Transfers Formatting Commands Force Interrupt Command INTERFACE CONNECTION DETAILS TRACK FORMAT SERIAL INTERFACE 㐞6 INTRODUCTION DESCRIPTION General SIO Overview SIO Architecture Processor Interface Write Register Definition Read Register Definition SIO Interrupt Sequence KEYBOARD COMMUNICATIONS General Keyboard Connector Detail Channel B Programming Details PARALLEL INTERFACE INTERRUPTS RS 232C COMMUNICATIONS Genera㐞6l RS232C Connector Detail Channel A Programming Details SIO PIN DETAIL System Connections Channel A Connections Channel B Connections .pa PARALLEL INTERFACE INTRODUCTION DESCRIPTION General Printer Interface System Control Interface SOUND GENERATION INTRODUCTION DESCRIPTION General Tone Gene㐞6ration Noise Generation EXPANSION SLOTS INTRODUCTION DESCRIPTION Electrical Specification Pin Detail Address Allocation Expansion Board Layout Detail DISK DRIVE INTRODUCTION DESCRIPTION General Interface Connections Disk Drive Mechanism Read/Write Head Head Positioning Mechanism Head Load Mec㐞6hanism Sensors and Detectors Drive Switch Settings Drive Specification DISKS General Disk Precautions Disk Insertion/Removal Write Protecting Disk Format KEYBOARD INTRODUCTION SERIAL LINK CONTROL AND FORMAT KEYSWITCH OPERATION MICROSCREEN OPERATION CLOCK OPERATION MOUSE PORT OPERATION 㐞 6KEYBOARD FIRMWARE DISPLAY UNIT INTRODUCTION DESCRIPTION General Physical Dimensions SECTION 3.SOFTWARE DETAIL PROGRAMMERS GUIDE TO THE BIOS INTRODUCTION BIOS Internal Structure --- Memory Map VECTORS POINTERS CHARACTER FONTS 1, 2 and 3 CACHE SYSINIT BIOS CODE BIOS CONSTANTS 㐞7 GLOBAL DATA AREA BIOS HEAP AND STACK MS-DOS 2.00 USER RAM SCREEN DRIVER INTRODUCTION APPLICATIONS INTEREST Escape Sequence Management Functions Environment Flags ANSI Escape Sequences Physical Screen Layout Reverse Field Video High/Low Intensity Underline Strikethrough Software Reserved 㐞7 Character Font-cell SYSTEMS INTEREST CRTC Initialization Low-level Display routines Cursor management routines How a character appears on the screen MICROSCREEN DRIVER INTRODUCTION APPLICATIONS INTEREST SYSTEMS INTEREST .pa KEYBOARD DRIVER INTRODUCTION APPLICATIONS INTEREST Keyboard Look-up table SYSTEMS INTERES㐞7T Keyboard to Apricot Handler Key Make Code handler Key Break Code handler Translation of data routines Auto Repeat handler Non make/break code interpreter Queue handlers for data flow to MS-DOS or screen MS-DOS queue Local queue Keyboard queue CONTROL DEVICE DRIVER INTRODUCTION APPLICATIONS INTEREST 㐞7 Calling the control device Specification of the Apricot Control Device Screen Driver Keyboard Driver MicroScreen Driver Serial Port Driver Parallel I/O Driver Mouse Port Driver Clock Driver Sound Generator Floppy Disk Drivers Cache/Graphics/IBM configuration SYSTEMS INTEREST DISK INPUT/OUTPUT SYSTEM AND D㐞7ISK FORMATS INTRODUCTION APPLICATIONS INTEREST SYSTEMS INTEREST Disk Format The Label Sector MS-DOS AND BIOS UTILISATION OF THE DISKS FAT's 1 and 2 Directory Character Font Keyboard table SYSINIT BIOS code and constants MS-DOS 2.0 Configuration data .pa BOOT ROM INTRODUCTION APPLICAT㐞7IONS INTERST Software Reset Logo display CALCULATOR INTRODUCTION APPLICATIONS INTEREST SYSTEMS INTEREST SOUND GENERATION INTRODUCTION APPLICATIONS INTEREST AUXILIARY DEVICE/SERIAL PORT INTRODUCTION APPLICATIONS INTEREST SYSTEMS INTEREST Modem Control Through the AUX Device GRAPHICS SYSTEM EXTENSION SYSTEM 㐞7 INTRODUCTION APPLICATIONS INTEREST Graphic System Extension Functions How to use Graphic Systems Extension What is Graphic System Extensions ? SYSTEMS INTEREST GRAPHICS.EXE ASSIGN.SYS DDACRT.SYS THE ACT GRAPHICS SYSTEM - DDACRT.SYS .pa APPENDICES Appendix A. CIRCUIT DIAGRAMS Appendix B. BOOT PROM DIAGNOSTICS 㐞7 Appendix C. DEFAULT CHARACTER FONT .pa .HE SECTION 1:SYSTEM OVERVIEW HARDWARE SOFTWARE OPTIONS .fo .PA .HE SECTION 2:HARDWARE DETAIL SYSTEM UNIT SYSTEM BOARD INTERRUPT CONTROLLER INTERVAL TIMER CRT CONTROL FLOPPY DISK INTERFACE SER㐞 7IAL INTERFACE PARALLEL INTERFACE SOUND GENERATION EXPANSION SLOTS DISK DRIVE KEYBOARD DISPLAY UNIT .FO .PA .HE SECTION 3: SOFTWARE DETAIL PROGRAMMERS GUIDE TO THE BIOS SCREEN DRIVER MICROSCREEN DRIVER KEYBOARD DRIVER CONTROL DEVICE DRIVER DISK INPUT/OUTPUT SYSTEM BOOT ROM 㐞8 CALCULATOR SOUND GENERATOR AUXILIARY DEVICE/SERIAL PORT GSX SYSTEM .OP .FO .PA .HE APPENDICES APPENDIX A: CIRCUIT DIAGRAMS APPENDIX B: BOOT PROM DIAGNOSTICS APPENDIX C: DEFAULT CHARACTER FONT .OP .FO .PADRIVER KEYBOARD DRIVER CONTROL DEVICE DRIVER DISK INPUT/OUTPUT SYSTEM BOOT ROM Z>8NZ>8NZ>8NZ>8NZ>8NZ>8NZ>8NZ> 8NZ>9NZ>9NZ>9NZ>9NZ>9NZ>9NZ>9NZ>9NZ> 9NZ>:NZ>:NZ>:NZ>:NZ>:NZ>:NZ>:NZ>:NZ> :NZ>;NZ>;NZ>;NZ>;NZ>;NZ>;NZ>;NZ>;NZ> ;NZ><NZ><NZ><NZ><NZ><NZ><NZ><NZ><NZ> <NZ>=NZ>=NZ>=NZ>=NZ>=NZ>=NZ>=NZ>=NZ> =NZ>>NZ>>NZ>>NZ>>NZ>>NZ>>NZ>>NZ>>NZ> >NZ>?NZ>?NZ>?NZ>?NZ>?NZ>?NZ>?NZ>?NZ> ?NZ>@NZ>@NZ>@NZ>@NZ>@NZ>@NZ>@NZ>@NZ> @NZ>ANZ>ANZ>ANZ>ANZ>ANZ>ANZ>ANZ>ANZ> ANZ>BNZ>BNZ>BNZ>BNZ>BNZ>BNZ>BNZ>BNZ> BNZ>CNZ>CNZ>CNZ>CNZ>CNZ>CNZ>CNZ>CNZ> CNZ>DNZ>DNZ>DNZ>DNZ>DNZ>DNZ>DNZ>DNZ> DNZ>ENZ>ENZ>ENZ>ENZ>ENZ>ENZ>ENZ>ENZ> EN㐞:ACT APRICOT TECHNICAL REFERENCE MANUAL (WORDSTAR) 1 OF 2